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Part: 74LVC1GU04
Category:
Logic
-> Gates
-> Inverters Gates
Description: 74LVC1GU04; Inverter;; Package: SOT353 (UMT5), SOT753
Company: Philips Semiconductors
Datasheet: Download 74LVC1GU04 datasheet File size : 132 kB
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INTEGRATED CIRCUITS
DATA SHEET
74LVC1GU04 Inverter
Product specification Supersedes data of 2003 Feb 12 2003 Jun 30
Philips Semiconductors
Product specification
Inverter
FEATURES · Wide supply voltage range from 1.65 to 5.5 V · High noise immunity · Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V). · ±24 mA output drive (VCC = 3.0 V) · CMOS low power consumption · Latch-up performance exceeds 250 mA · Input accepts voltages up to 5 V · Multiple package options · ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. · Specified from -40 to +125 °C. · SOT353 and SOT753 packages. QUICK REFERENCE DATA Ground = 0 V; Tamb = 25 °C; tr = tf 2.5 ns. SYMBOL tPHL/tPLH PARAMETER propagation delay A to Y CONDITIONS VCC = 1.8 V; CL = 30 pF; RL = 1 k VCC = 2.5 V; CL = 30 pF; RL = 500 VCC = 2.7 V; CL = 50 pF; RL = 500 VCC = 3.3 V; CL = 50 pF; RL = 500 VCC = 5.0 V; CL = 50 pF; RL = 500 CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. input capacitance power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 DESCRIPTION
74LVC1GU04
The 74LVC1GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of this device in a mixed 3.3 and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. The 74LVC1GU04 provides the inverting single state unbuffered function.
TYPICAL 1.7 1.3 1.7 1.6 1.3 6 14.9 ns ns ns ns ns
UNIT
pF pF
2003 Jun 30
2
Philips Semiconductors
Product specification
Inver ter
FUNCTION TABLE See note 1. INPUT A L H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING INFORMATION PACKAGE TYPE NUMBER 74LVC1GU04GW 74LVC1GU04GV PINNING PIN 1 2 3 4 5 n.c. A GND Y VCC SYMBOL not connected data input A ground (0 V) data output Y supply voltage DESCRIPTION TEMPERATURE RANGE -40 to +125 °C -40 to +125 °C PINS 5 5 PACKAGE SC-88A SC-74A MATERIAL plastic plastic OUTPUT Y H L
74LVC1GU04
CODE SOT353 SOT753
MARKING VD VU4
handbook, halfpage
n.c. 1 A2 GND 3
MNA042
5 VCC
handbook, halfpage
U04
4 Y
2
A
Y
4
MNA108
Fig.1 Pin configuration.
Fig.2 Logic symbol.
2003 Jun 30
3
Philips Semiconductors
Product specification
Inver ter
74LVC1GU04
handbook, halfpage handbook, halfpage
VCC
VCC
2
1
4 A
MNA109
100 Y
MNA636
Fig.3 IEE/IEC logic symbol.
Fig.4 Logic diagram.
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V PARAMETER CONDITIONS MIN. 1.65 0 0 -40 0 MAX. 5.5 5.5 VCC +125 20 UNIT V V V °C ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO ICC, IGND Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 55 °C the value of PD derates linearly with 4.5 mW/K. supply voltage input diode current input voltage output diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation per package for temperature range from -40 to +125 °C; note 2 VI VCC or VO < 0 active mode; note 1 VO = 0 to VCC PARAMETER CONDITIONS MIN. -0.5 - -0.5 - -0.5 - - -65 - MAX. +6.5 -50 +6.5 ±50 VCC + 0.5 ±50 ±100 +150 200 UNIT V mA V mA V mA mA °C mW
2003 Jun 30
4
Philips Semiconductors
Product specification
Inver ter
DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +85 °C VIH VIL VOL HIGH-level input voltage LOW-level input voltage LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL IO = -100 µA IO = -4 mA IO = -8 mA IO = -12 mA IO = -24 mA IO = -32 mA ILI ICC input leakage current quiescent supply current VI = 5.5 V or GND VI = VCC or GND; IO = 0 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 3.6 5.5 VCC - 0.1 1.2 1.9 2.2 2.3 3.8 - - - - - - - - ±0.1 0.1 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 - - - - - - - - - - - - 1.65 to 5.5 1.65 to 5.5 0.75 × VCC - - - VCC (V) MIN. TYP.(1)
74LVC1GU04
MAX.
UNIT
-
V
0.25 × VCC V 0.1 0.45 0.3 0.4 0.55 0.55 - - - - - - ±5 10 V V V V V V V V V V V V µA µA
Tamb = -40 to +125 °C VIH VIL VOL HIGH-level input voltage LOW-level input voltage LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 - - - - - - - - - - - - 0.1 0.70 0.45 0.60 0.80 0.80 V V V V V V 1.65 to 5.5 1.65 to 5.5 0.8 × VCC - - - - 0.2 × VCC V V
2003 Jun 30
5
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