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Details, datasheet, quote on part number:74LVC3G06DP
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| Part: | 74LVC3G06DP |
| Category: | Logic => Gates => Inverters Gates |
| Description: | Triple Inverter With Open-drain Output <<<>>>The 74LVC3G06 is a High-performance, Low-power, Low-voltage, Si-gate CMOS Device And Superior to MOSt Advanced CMOS Compatible TTL Families. <<<>>><<<>>>Inputs CAN be Driven From Either 3.3 V or 5 V Devices. This Feature Allows The Use of This Device in a Mixed 3.3 V And 5 V Environment. <<<>>><<<>>>Schmitt Trigger Action at All Inputs Makes The Circuit Tolerant For Slower Input Rise And Fall Time. <<<>>><<<>>>This Device is Fully Specified For Partial Power-down Applications Using Ioff . The Ioff Circuitry Disables The Output, Preventing The Damaging Backflow Current Through The Device When it is Powered Down. <<<>>><<<>>>The 74LVC3G06 Provides Three Inverting Buffers. <<<>>><<<>>>The Output of This Device is an Open Drain And CAN be Connected to Other Open-drain Outputs to Implement Active-low Wired-or or Active-high Wired-and Functions. |
| Company: | Philips Semiconductors |
| Datasheet: | Download 74LVC3G06DP datasheet File size : 76 kB |
| Request For quote: | Find where to buy 74LVC3G06DP
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Datasheet text preview:
74LVC3G06
Triple inverter with open-drain output
Rev. 01 -- 7 June 2004 Product data sheet
1. General description
The 74LVC3G06 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for par tial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
2. Features
s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8-B/JESD36 (2.7 V to 3.6 V). ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. -24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V SOT505-2 and SOT765-1 package Specified from -40 °C to +85 °C and -40 °C to +125 °C.
s
s s s s s s s
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
3. Quick reference data
Table 1: Quick reference data GND = 0 V; Tamb = 25 °C. Symbol tPLZ, tPZL Parameter propagation delay input nA to output nY Conditions VCC = 1.8 V; CL = 30 pF; RL = 1 k VCC = 2.5 V; CL = 30 pF; RL = 500 VCC = 2.7 V; CL = 50 pF; RL = 500 VCC = 3.3 V; CL = 50 pF; RL = 500 VCC = 5.0 V; CL = 50 pF; RL = 500 CI CPD
[1]
Min -
Typ 2.6 1.6 2.2 2.0 1.4 2.5 5.9
Max -
Unit ns ns ns ns ns pF pF
input capacitance power dissipation capacitance per gate VCC = 3.3 V
[1] [2]
-
CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL × VCC2 × fo) = sum of the outputs. The condition is VI = GND to VCC.
[2]
4. Ordering information
Table 2: Ordering information Temperature range -40 °C to +125 °C -40 °C to +125 °C Package Name TSSOP8 VSSOP8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm Version SOT505-2 SOT765-1 Type number 74LVC3G06DP 74LVC3G06DC
5. Marking
Table 3: Marking Marking code V06 V06 Type number 74LVC3G06DP 74LVC3G06DC
9397 750 13266
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 7 June 2004
2 of 14
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
6. Functional diagram
1 1 1A 1Y 7 3 3 2A 2Y 5
1
7
1
5
6
3A
3Y
2
6
1
2
mnb032
mnb031
Fig 1. Logic symbol.
Fig 2. IEC logic symbol.
Y
A GND mna586
Fig 3. Logic diagram (one driver).
7. Pinning information
7.1 Pinning
1A 3Y 2A GND
1 2 3 4
mnb030
8 7
VCC 1Y 3A 2Y
06
6 5
Fig 4. Pin configuration.
7.2 Pin description
Table 4: Symbol 1A 3Y 2A GND 2Y Pin description Pin 1 2 3 4 5 Description data input data output data input ground (0 V) data output
9397 750 13266
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 7 June 2004
3 of 14
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
Pin description ...continued Pin 6 7 8 Description data input data output supply voltage
Table 4: Symbol 3A 1Y VCC
8. Functional description
8.1 Function table
Table 5: Input nA L H
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
Function table [1] Output nY Z L
9. Limiting values
Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC, IGND Tstg Ptot
[1] [2]
Parameter supply voltage input diode current input voltage output diode current output voltage output sink current VCC or GND current storage temperature power dissipation
Conditions VI < 0 V
[1]
Min -0.5 -0.5 [1] [1] [2]
Max +6.5 -50 +6.5 -50 +6.5 +6.5 50 ±100 +150 300
Unit V mA V mA V V mA mA °C mW
VO < 0 V active mode Power-down mode VO = 0 V to 6.5 V
-0.5 -0.5 -65
Tamb = -40 °C to +125 °C
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
9397 750 13266
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 7 June 2004
4 of 14
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
10. Recommended operating conditions
Table 7: Symbol VCC VI VO Tamb tr, tf Recommended operating conditions Parameter supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.65 V to 2.7 V VCC = 2.7 V to 5.5 V active mode Power-down mode; VCC = 0 V Conditions Min 1.65 0 0 0 -40 0 0 Typ Max 5.5 5.5 VCC 5.5 +125 20 10 Unit V V V V °C ns/V ns/V
11. Static characteristics
Table 8: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH Parameter °C [1] VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA; VCC = 1.65 V to 5.5 V IO = 4 mA; VCC = 1.65 V IO = 8 mA; VCC = 2.3 V IO = 12 mA; VCC = 2.7 V IO = 24 mA; VCC = 3.0 V IO = 32 mA; VCC = 4.5 V ILI IOZ Ioff ICC ICC input leakage current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V 3-state output OFF-state current power off leakage current quiescent supply current additional quiescent supply current per pin VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V VI or VO = 5.5 V; VCC = 0 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V
[2] [2]
Conditions
Min
Typ
Max 0.7 0.8 0.3 × VCC 0.1 0.45 0.3 0.4 0.55 0.55 ±5 ±10 ±10 10 500
Unit V V V V V V V V V V V V V µA µA µA µA µA
Tamb = -40 °C to +85
HIGH-level input voltage
0.65 × VCC 1.7 2.0 0.7 × VCC ±0.1 ±0.1 ±0.1 0.1 5
0.35 × VCC V
9397 750 13266
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 7 June 2004
5 of 14
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