|
Details, datasheet, quote on part number:74LVC3G17DC
| |
| Part: | 74LVC3G17DC |
| Category: | Logic => Schmitt Triggers |
| Description: | Triple Non-inverting Schmitt-trigger With 5 V Tolerant Input<<<>>>the 74LVC3G17 is a High-performance, Low-power, Low-voltage, Si-gate CMOS Device And Superior to MOSt Advanced CMOS Compatible TTL Families. <<<>>><<<>>>Inputs CAN be Driven From Either 3.3 V or 5 V Devices. This Feature Allows The Use of These Devices as Translators in a Mixed 3.3 V And 5 V Environment. <<<>>><<<>>>This Device is Fully Specified For Partial Power-down Applications Using Ioff . The Ioff Circuitry Disables The Output, Preventing The Damaging Backflow Current Through The Device When it is Powered Down. <<<>>><<<>>>The 74LVC3G17 Provides Three Non-inverting Buffers With Schmitt-trigger Action. It is Capable of Transforming Slowly Changing Input Signals Into Sharply Defined, Jitter-free Output Signals. <<<>>><<<>>> <<<>>> Features Wide Supply Voltage Range From 1.65 V to 5.5 V <<<>>>5 V Tolerant Input/output For Interfacing With 5 V Logic <<<>>>High Noise Immunity <<<>>>ESD Protection: <<<>>>HBM EIA/JESD22-A114-B Exceeds 2000 V <<<>>>MM EIA/JESD22-A115-A Exceeds 200 V. <<<>>>+-24 ma Output Drive (VCC = 3.0 V) <<<>>>CMOS Low Power Consumption <<<>>>Latch-up Performance Exceeds 250 ma <<<>>>Direct Interface With TTL Levels <<<>>>SOT505 And SOT765 Package <<<>>>Specified From -40 Cel to +85Cel And -40 Cel to +125 Cel. |
| Company: | Philips Semiconductors |
| Datasheet: | Download 74LVC3G17DC datasheet File size : 87 kB |
| Request For quote: | Find where to buy 74LVC3G17DC
|
| |
Datasheet text preview:
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
Rev. 01 -- 24 June 2004 Product data sheet
1. General description
The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. This device is fully specified for par tial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC3G17 provides three non-inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
2. Features
s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. ±24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels SOT505 and SOT765 package Specified from -40 °C to +85 °C and -40 °C to +125 °C.
s s s s s s
3. Applications
s Wave and pulse shapers for highly noisy environments.
Philips Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
4. Quick reference data
Table 1: Quick reference data GND = 0 V; Tamb = 25 °C. Symbol tPHL, tPLH Parameter Conditions Min [1] [2]
Typ 5.6 3.7 3.8 3.6 2.7 3.5 16.3
Max -
Unit ns ns ns ns ns pF pF
propagation delay VCC = 1.8 V; CL = 30 pF; inputs nA to output nY RL = 1 k VCC = 2.5 V; CL = 30 pF; RL = 500 VCC = 2.7 V; CL = 50 pF; RL = 500 VCC = 3.3 V; CL = 50 pF; RL = 500 VCC = 5.0 V; CL = 50 pF; RL = 500
CI CPD
[1]
input capacitance power dissipation VCC = 3.3 V capacitance per buffer
-
CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL × VCC2 × fo) = sum of outputs. The condition is VI = GND to VCC.
[2]
5. Ordering information
Table 2: Ordering information Package Temperature range 74LVC3G17DP -40 °C to +125 °C 74LVC3G17DC -40 °C to +125 °C Name TSSOP8 VSSOP8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm Version SOT505-2 Type number
plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm
9397 750 13332
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2004
2 of 15
Philips Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
6. Functional diagram
1
1A
1Y
7
1
7
2
3Y
3A
6
6
2
3
2A
2Y
001aab107
5
3
5
001aab108
Fig 1. Logic symbol.
Fig 2. IEC logic symbol.
A
Y
001aab109
Fig 3. Logic diagram.
7. Pinning information
7.1 Pinning
1A 3Y 2A GND
1 2 3 4
001aab106
8 7
VCC 1Y 3A 2Y
3G17
6 5
Fig 4. Pin configuration.
7.2 Pin description
Table 3: Symbol 1A 3Y 2A GND 2Y 3A 1Y VCC Pin description Pin 1 2 3 4 5 6 7 8 Description data input data output data input ground (0 V) data output data input data output supply voltage
9397 750 13332
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2004
3 of 15
Philips Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
8. Functional description
8.1 Function table
Table 4: Input nA L H
[1] H = HIGH voltage level; L = LOW voltage level.
Function table [1] Output nY L H
9. Limiting values
Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC, IGND Tstg Ptot
[1] [2]
Parameter supply voltage input diode current input voltage output diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation
Conditions VI < 0 V
[1]
Min -0.5 -0.5 [1] [1] [2]
Max +6.5 -50 +6.5 ±50 +6.5 ±50 ±100 +150 300
Unit V mA V mA V mA mA °C mW
VO > VCC or VO < 0 V active mode Power-down mode VO = 0 V to VCC
-0.5 -0.5 -65
VCC + 0.5 V
Tamb = -40 °C to +125 °C
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
10. Recommended operating conditions
Table 6: Symbol VCC VI VO Tamb Recommended operating conditions Parameter supply voltage input voltage output voltage operating ambient temperature Conditions Min 1.65 0 0 -40 Typ Max 5.5 5.5 VCC +125 Unit V V V °C
9397 750 13332
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2004
4 of 15
Philips Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
11. Static characteristics
Table 7: Symbol VOL Static characteristics Parameter °C [1] VI = VIH or VIL IO = 100 µA; VCC = 1.65 V to 5.5 V IO = 4 mA; VCC = 1.65 V IO = 8 mA; VCC = 2.3 V IO = 12 mA; VCC = 2.7 V IO = 24 mA; VCC = 3.0 V IO = 32 mA; VCC = 4.5 V VOH HIGH-level output voltage VI = VIH or VIL IO = -100 µA; VCC = 1.65 V to 5.5 V IO = -4 mA; VCC = 1.65 V IO = -8 mA; VCC = 2.3 V IO = -12 mA; VCC = 2.7 V IO = -24 mA; VCC = 3.0 V IO = -32 mA; VCC = 4.5 V ILI Ioff ICC ICC CI VOL input leakage current power off leakage current quiescent supply current VI = 5.5 V or GND; VCC = 5.5 V VI or VO = 5.5 V; VCC = 0 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VCC - 0.1 1.2 1.9 2.2 2.3 3.8 VI = VIH or VIL IO = 100 µA; VCC = 1.65 V to 5.5 V IO = 4 mA; VCC = 1.65 V IO = 8 mA; VCC = 2.3 V IO = 12 mA; VCC = 2.7 V IO = 24 mA; VCC = 3.0 V IO = 32 mA; VCC = 4.5 V 0.1 0.70 0.45 0.60 0.80 0.80 V V V V V V ±0.1 ±0.1 0.1 5 3.5 ±5 ±10 10 500 V V V V V V µA µA µA µA pF 0.1 0.45 0.3 0.4 0.55 0.55 V V V V V V LOW-level output voltage Conditions Min Typ Max Unit
Tamb = -40 °C to +85
additional quiescent VI = VCC - 0.6 V; IO = 0 A; supply current per pin VCC = 2.3 V to 5.5 V input capacitance LOW-level output voltage
Tamb = -40 °C to +125 °C
9397 750 13332
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2004
5 of 15
|
|
