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Part: 74LVCH322244AEC
Category:
Logic
-> Buffers/Drivers
Description: 74LVC322244A; 74LVCH322244A; 32-bit Buffer/line Driver; With 30 Ohm Series Termination Resistors; 5 V Input/output Tolerant; 3-state;; Package: SOT536-1 (LFBGA96)
Company: Philips Semiconductors
Datasheet: Download 74LVCH322244AEC datasheet File size : 143 kB
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
74LVC322244A; 74LVCH322244A 32-bit buffer/line driver; with 30 series termination resistors; 5 V input/output tolerant; 3-state
Product specification File under Integrated Circuits, IC24 1999 Aug 31
Philips Semiconductors
Product specification
32-bit buffer/line driver; with 30 series termination resistors; 5 V input/output tolerant; 3-state
FEATURES · 5 V tolerant inputs/outputs for interfacing with 5 V logic · Wide supply voltage range of 1.2 to 3.6 V · CMOS low power consumption · MULTIBYTETM flow-trough standard pin-out architecture · Low inductance multiple power and ground pins for minimum noise and ground bounce · Direct interface with TTL levels · Bus hold on data inputs (74LVCH322244A only) · Integrated 30 termination resistors · Typical output ground bounce voltage: VOLP 2 V at VCC = 3.3 V; Tamb = 25 °C · Power-off disabled outputs, permitting live insertion · Plastic fine-pitch ball grid array package. DESCRIPTION
74LVC322244A; 74LVCH322244A
The 74LVC(H)322244A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices in a mixed 3.3 and 5 V environment. The 74LVC(H)322244A is a 32-bit non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on input nOE causes the outputs to assume a high-impedance OFF-state. The 74LVC(H)322244A is designed with 30 series termination resistors in both HIGH and LOW output stages to reduce line noise. To ensure the high-impedance state during power-up or power-down, input nOE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The 74LVCH322244A bus hold data input circuit eliminates the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level (see Fig.3).
QUICK REFERENCE DATA Ground = 0 V; Tamb = 25 °C; tr = tf 2.5 ns. SYMBOL tPHL/tPLH CI CPD Note 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; (CL × VCC2 × fo) = sum of the outputs. PARAMETER propagation delay nAn to nYn input capacitance power dissipation capacitance per buffer VI = GND to VCC; note 1 CONDITIONS CL = 50 pF; VCC = 3.3 V TYPICAL 2.9 5.0 25 UNIT ns pF pF
1999 Aug 31
2
Philips Semiconductors
Product specification
32-bit buffer/line driver; with 30 series termination resistors; 5 V input/output tolerant; 3-state
FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGES TYPE NUMBER 74LVC322244AEC 74LVCH322244AEC PINNING SYMBOL nAn nYn GND nOE VCC data inputs data outputs ground (0 V) 3-state output enable inputs (active LOW) DC supply voltage DESCRIPTION TEMPERATURE RANGE -40 to +85 °C PINS 96 96 nAn L H X
74LVC322244A; 74LVCH322244A
OUTPUT nYn L H Z
PACKAGE MATERIAL LFBGA96 LFBGA96 plastic plastic
CODE SOT536-1 SOT536-1
1999 Aug 31
3
Philips Semiconductors
Product specification
32-bit buffer/line driver; with 30 series termination resistors; 5 V input/output tolerant; 3-state
74LVC322244A; 74LVCH322244A
handbook, full pagewidth
MNA471
6 5 4 3 2 1
1A1 1A0
1A3 1A2
2A1 2A0
2A3 2A2
3A1 3A0
3A3 3A2
4A1 4A0
4A2 4A3
5A1 5A0
5A3 5A2
6A1 6A0
6A3 6A2
7A1 7A0
7A3 7A2
8A1 8A0
8A2 8A3
2OE GND VCC GND GND VCC GND 3OE 6OE GND VCC GND GND VCC GND 7OE 1OE GND VCC GND GND VCC GND 4OE 5OE GND VCC GND GND VCC GND 8OE 1Y0 1Y1 A 1Y2 1Y3 B 2Y0 2Y1 C 2Y2 2Y3 D 3Y0 3Y1 E 3Y2 3Y3 F 4Y0 4Y1 G 4Y3 4Y2 H 5Y0 5Y1 J 5Y2 5Y3 K 6Y0 6Y1 L 6Y2 6Y3 M 7Y0 7Y1 N 7Y2 7Y3 P 8Y0 8Y1 R 8Y3 8Y2 T
Fig.1 Pin configuration.
1A handbook, full pagewidth 0 A5 A6 B5 B6 A3 1A1 1A2 1A3 1OE
1Y0 1Y1 1Y2 1Y3
A2 A1 B2 B1
E5 E6 F5 F6 H4
3A0 3A1 3A2 3A3 3OE
3Y0 3Y1 3Y2 3Y3
E2 E1 F2 F1
J5 J6 K5 K6 J3
5A0 5A1 5A2 5A3 5OE
5Y0 5Y1 5Y2 5Y3
J2 J1 K2 K1
N5 N6 P5 P6 T4
7A0 7A1 7A2 7A3 7OE
7Y0 7Y1 7Y2 7Y3
N2 N1 P2 P1
C5 C6 D5 D6 A4
2A0 2A1 2A2 2A3 2OE
2Y0 2Y1 2Y2 2Y3
C2 C1 D2 D1
G5 G6 H6 H5 H3
4A0 4A1 4A2 4A3 4OE
4Y0 4Y1 4Y2 4Y3
G2 G1 H1 H2
L5 L6 M5 M6 J4
6A0 6A1 6A2 6A3 6OE
6Y0 6Y1 6Y2 6Y3
L2 L1 M2 M1
R5 R6 T6 T5 T3
8A0 8A1 8A2 8A3 8OE
8Y0 8Y1 8Y2 8Y3
R2 R1 T1 T2
MNA472
Fig.2 Logic symbol.
1999 Aug 31
4
Philips Semiconductors
Product specification
32-bit buffer/line driver; with 30 series termination resistors; 5 V input/output tolerant; 3-state
74LVC322244A; 74LVCH322244A
handbook, halfpage
VCC
data input
to internal circuit
MNA473
Fig.3 Bus hold circuit.
1999 Aug 31
5
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