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Part: BAP63-01
Category:
Description: 74LVT126; 3.3V Quad Buffer (3-State)
Company: Philips Semiconductors
Datasheet: Download BAP63-01 datasheet File size : 58 kB
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INTEGRATED CIRCUITS
74LVT126 3.3V Quad buffer (3-State)
Product specification Supersedes data of 1995 Dec 21 IC23 Data Handbook 1998 Feb 19
Philips Semiconductors
Philips Semiconductors
Product specification
3.3V Quad buffer (3-State)
74LVT126
FEATURES
· Quad bus interface · 3-State buffers · Output capability: +64mA/-32mA · TTL input and output switching levels · Input and output interface capability to systems at 5V supply · Bus-hold data inputs eliminate the need for external pull-up · Live insertion/extraction permitted · No bus current loading when output is tied to 5V bus · Power-up 3-State · Latch-up protection exceeds 500mA per JEDEC Std 17 · ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model resistors to hold unused inputs
DESCRIPTION
The LVT126 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT126 device is a quad buffer that is ideal for driving bus lines. The device features four Output Enables (OE0, OE1, OE2, OE3), each controlling one of the 3-State outputs.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN COUT ICCZ PARAMETER Propagation delay An to Yn Input capacitance Output capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 3.3V VI = 0V or VCC Outputs disabled; VO = 0V or 3.0V Outputs disabled; VCC = 3.6V TYPICAL 2.3 2.4 4 8 0.13 UNIT ns pF pF mA
ORDERING INFORMATION
PACKAGES 14-Pin Plastic SO 14-Pin Plastic SSOP 14-Pin Plastic TSSOP TEMPERATURE RANGE 40°C to +85°C 40°C to +85°C 40°C to +85°C OUTSIDE NORTH AMERICA 74LVT126 D 74LVT126 DB 74LVT126 PW NORTH AMERICA 74LVT126 D 74LVT126 DB 74LVT126PW DH DWG NUMBER SOT108-1 SOT337-1 SOT402-1
PIN DESCRIPTION
PIN NUMBER 2, 5, 9, 12 3, 6, 8, 11 1, 4, 10, 13 7 14 SYMBOL A0 A3 Y0 Y3 OE0 OE3 GND VCC Data inputs Data outputs Output enable inputs Ground (0V) Positive supply voltage NAME AND FUNCTION
PIN CONFIGURATION
LOGIC SYMBOL
1 OE0 2 4 OE1 A1 5 10 OE2 A2 9 13 OE3 A3 12 11 Y3 8 Y2 6 Y1 3 Y0
OE0 A0 Y0 OE1 A1 Y1 GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
V CC OE3 A3 Y3 OE2 A2 Y2
A0
SA00031
SV00093
1998 Feb 19
2
853-1822 18991
Philips Semiconductors
Product specification
3.3V Quad buffer (3-State)
74LVT126
LOGIC SYMBOL (IEEE/IEC)
FUNCTION TABLE
INPUTS OUTPUTS An L H X Yn L H Z OEn
1 2 4 5 10 9 13 12
EN
1
3
H H L
6
8
11
H L X Z
= High voltage level = Low voltage level = Don't care = High impedance "off " state
SV00134
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC VI VOUT IOUT IIK IOK Tstg PARAMETER DC supply voltage DC input voltage3 DC output voltage3 DC output current output current Out in High State DC input diode current DC output diode current Storage temperature range VI < 0 VO < 0 64 50 50 65 to 150 mA mA mA °C Output in Off or High state Output in Low state CONDITIONS RATING 0.5 to +4.6 0.5 to +7.0 0.5 to +7.0 128 UNIT V V V mA
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Low-level output current; current duty cycle 50%, f 1kHz Input transition rise or fall rate; outputs enabled Operating free-air temperature range 40 2.7 0 2.0 0.8 32 32 mA 64 10 +85 ns/V °C LIMITS MAX 3.6 5.5 V V V V mA UNIT
1998 Feb 19
3
Philips Semiconductors
Product specification
3.3V Quad buffer (3-State)
74LVT126
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL VIK VOH PARAMETER Input clamp voltage High-level output voltage TEST CONDITIONS VCC = 2.7V; IIK = 18mA VCC = 2.7 to 3.6V; IOH = 100µA VCC = 2.7V; IOH = 8mA VCC = 3.0V; IOH = 32mA VCC = 2.7V; IOL = 100µA VCC = 2.7V; IOL = 24mA VOL Low-level output voltage VCC = 3.0V; IOL = 16mA VCC = 3.0V; IOL = 32mA VCC = 3.0V; IOL = 64mA VCC = 0 or 3.6V; VI = 5.5V II Input leakage current leakage current VCC = 3.6V; VI = VCC or GND VCC = 3.6V; VI = VCC VCC = 3.6V; VI = 0 IOFF IHOLD Output off current Bus Hold current A inputs6 Current into an output in the High state when VO > VCC Power up/down 3-State output current3 3-State output high current 3-State output low current Quiescent supply current Additional supply current per input pin2 VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V VCC = 3V; VI = 2.0V VCC = 0V to 3.6V; VCC = 3.6V IEX IPU/PD IOZH IOZL ICCH ICCL ICCZ ICC VO = 5.5V; VCC = 3.0V VCC 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don't care VCC = 3.6V; VO = 3.0V VCC = 3.6V; VO = 0.5V VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 05 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 75 75 ±500 60 ±1 1 1 0.13 2 0.13 0.1 125 ±100 5 5 0.19 7 0.19 0.2 mA mA µA µA µA µA All inputs Control pins Data pins4 ins VCC-0.2 2.4 2.0 Temp = -40°C to +85°C MIN TYP1 0.9 VCC-0.1 2.5 2.2 0.1 0.3 0.25 0.3 0.4 1 ±0.1 0.1 1 1 150 150 µA 0.2 0.5 0.4 0.5 0.55 10 ±1 1 -5 ±100 µA µA V V MAX 1.2 V UNIT
NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. ICCZ is measured with outputs pulled up to VCC or down to GND. 6. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500, Tamb = 40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM MIN tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay An to Yn Output enable time OEn to Yn Output disable time OEn to Yn 1 2 2 1.0 1.0 1.0 1.1 1.0 1.3 VCC = 3.3V ±0.3V TYP1 2.3 2.4 3.6 3.6 2.2 3.6 MAX 3.8 3.9 5.4 5.2 3.8 5.5 VCC = 2.7V MAX 4.5 4.4 6.1 5.8 4.3 6.1 ns ns ns UNIT
NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 1998 Feb 19 4
Philips Semiconductors
Product specification
3.3V Quad buffer (3-State)
74LVT126
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
3V OE INPUT 1.5V INPUT 0V tPLH tPHL VOH 1.5V OUTPUT VOL 1.5V tPZH tPHZ VOH VOH 0.3V Yn OUTPUT VM 0V Yn OUTPUT tPZL tPLZ 3.5V 1.5V VM VM
VM
VOL + 0.3V VOL
SA00028
Waveform 1. Input (An) to Output (Yn) Propagation Delays
SV00094
Waveform 2. 3-State Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
V CC 6.0V Open V IN PULSE GENERATOR RT D.U.T. CL RL tTHL (tF) tTLH (tR) VOUT RL GND tW VM 10% 10% 0V tTLH (tR) tTHL (tF) 90% VM 10% tW 0V AMP (V) VM AMP (V)
90% NEGATIVE PULSE
90%
Test Circuit for 3-State Outputs
90% POSITIVE PULSE 10% VM
SWITCH POSITION
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH SWITCH Open 6V GND
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT 2.7V Rep. Rate v10MHz tW tR tF
500ns v2.5ns v2.5ns
SV00092
1998 Feb 19
5
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