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Part: LPC2106BBD48
Category:
Microcontrollers
-> 16/32 bit
-> 16/32-bit ARM7 (LPC2000)
Description: LPC2104/2105/2106; Single-chip 32-bit Microcontrollers; 128 KB Isp/iap Flash With 64 KB/32 KB/16 KB RAM;; Package: SOT313-2 (LQFP48)
Company: Philips Semiconductors
Datasheet: Download LPC2106BBD48 datasheet File size : 165 kB
Request For quote: Find where to buy LPC2106BBD48
Datasheet text preview:
LPC2104/2105/2106
Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
Rev. 02 -- 11 June 2003 Product data
1. General description
The LPC2104, 2105 and 2106 are based on a 16/32 bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 128 kbytes (kB) of embedded high speed flash memory. A 128 bit wide memory interface and a unique accelerator architecture enable 32 bit code execution at maximum clock rate. For critical code size applications, the alternative 16-bit Thumb Mode reduces code by more than 30% with minimal performance penalty. Due to their tiny size and low power consumption, these microcontrollers are ideal for applications where miniaturization is a key requirement, such as access control and point-of-sale. With a wide range of serial communications interfaces and on-chip SRAM options up to 64 kilobytes, they are very well suited for communication gateways and protocol converters, soft modems, voice recognition and low end imaging, providing both large buffer size and high processing power. Various 32 bit timers, PWM channels and 32 GPIO lines make these microcontrollers particularly suitable for industrial control and medical systems.
2. Features
2.1 Key features
s 16/32 bit ARM7TDMI-S processor. s 16/32/64 kB on-chip Static RAM. s 128 kB on-chip Flash Program Memory. 128 bit wide interface/accelerator enables high speed 60 MHz operation. s In-System Programming (ISP) and In-Application Programming (IAP) via on-chip boot-loader software. Flash programming takes 1 ms per 512 byte line. Single sector or full chip erase takes 400 ms. s Vectored Interrupt Controller with configurable priorities and vector addresses. s EmbeddedICE-RT interface enables breakpoints and watchpoints. Interrupt ser vice routines can continue to execute whilst the foreground task is debugged with the on-chip RealMonitor software. s Embedded Trace Macrocell enables non-intrusive high speed real-time tracing of instruction execution. s Multiple serial interfaces including two UARTs (16C550), Fast I2C (400 kbits/s) and SPI. s Two 32-bit timers (7 capture/compare channels), PWM unit (6 outputs), Real Time Clock and Watchdog. s Up to thirty-two 5 V tolerant general purpose I/O pins in a tiny LQFP48 (7 × 7 mm2) package.
Philips Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
s 60 MHz maximum CPU clock available from programmable on-chip Phase-Locked Loop. s On-chip crystal oscillator with an operating range of 10 MHz to 25 MHz. s Two low power modes, Idle and Power-down. s Processor wake-up from Power-down mode via external interrupt. s Individual enable/disable of peripheral functions for power optimization. s Dual power supply: x CPU operating voltage range of 1.65 V to 1.95 V (1.8 V ±8.3%). x I/O power supply range of 3.0 V to 3.6 V (3.3 V ±10%) with 5 V tolerant I/O pads.
3. Ordering information
Table 1: Ordering information Package Name LPC2104BBD48 LPC2105BBD48 LPC2106BBD48 LQFP48 LQFP48 LQFP48 Description Version plastic low profile quad flat package, 48 leads, SOT313-2 body 7 × 7 × 1.4 mm plastic low profile quad flat package, 48 leads, SOT313-2 body 7 × 7 × 1.4 mm plastic low profile quad flat package, 48 leads, SOT313-2 body 7 × 7 × 1.4 mm Type number
3.1 Ordering options
Table 2: Part options Flash memory 128 kB 128 kB 128 kB RAM 16 kB 32 kB 64 kB Temperature range 0 to +70, LQFP 0 to +70, LQFP 0 to +70, LQFP Type number LPC2104BBD48 LPC2105BBD48 LPC2106BBD48
9397 750 11499
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 -- 11 June 2003
2 of 34
Philips Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
4. Block diagram
TRST(1) TMS(1) TCK(1) TDI(1) TDO(1)
RT CK
XTAL1 PLL system clock
XTAL2
TEST/DEBUG INTERFACE
EMULATION TRACE MODULE
SYSTEM FUNCTIONS
ARM7TDMI-S
AHB BRIDGE ARM7 LOCAL BUS
VECTORED INTERRUPT CONTROLLER
AMBA AHB (Advanced High-performance Bus)
INTERNAL SRAM CONTROLLER
INTERNAL FLASH CONTROLLER AHB TO VPB VPB BRIDGE DIVIDER
AHB DECODER
16/32/64 kB SRAM
128 kB FLASH
APB(2) EINT0* EINT1* EINT2* EXTERNAL INTERRUPTS I2C SERIAL INTERFACE SCL* SDA*
CAP0..2* MAT0..2*
CAPTURE/ COMPARE TIMER 0
SPI SERIAL INTERFACE
CAP0..3* MAT0..3*
CAPTURE/ COMPARE TIMER 1
UART0
GPIO (32 PINS)
GENERAL PURPOSE I/O
UART1
MODEM CONTROL (6 PINS)*
PWM1..6*
PWM0
WATCHDOG TIMER
REAL TIME CLOCK
SYSTEM CONTROL
*Shared with GPIO
(1) When test/debug interface is used, GPIO/other function sharing these pins are not available. (2) APB with Ready signal.
Fig 1. Block diagram.
9397 750 11499 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 -- 11 June 2003
RST VDD VSS SCK* MOSI* MISO* SSEL* TxD* RxD* TxD* RxD*
002aaa412
3 of 34
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