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Details, datasheet, quote on part number:N74F649N
 
 
Part:N74F649N
Description:Octal Transceiver/register, Non-inverting Open-collector
Company:Philips Semiconductors
Datasheet:Download N74F649N datasheet   File size : 118 kB
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Datasheet text preview:
INTEGRATED CIRCUITS
74F647 Octal transceiver/register, non-inverting (open-collector) 74F649 Octal transceiver/register, inverting (open-collector)
Product specification IC15 Data Handbook 1992 Feb 28
Philips Semiconductors
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647 Octal Transceiver/Register, Non-inverting (Open Collector) 74F649 Octal Transceiver/Register, Inverting (Open Collector)
FEATURES
74F647/74F649
· High impedance NPN base inputs for reduced loading
(20µA in High and Low states)
· Independent registers for A and B buses · Multiplexed real-time and stored data · Choice of non-inverting and inverting data paths · Open Collector outputs · 300 mil wide 24-pin Slim Dip package
DESCRIPTION
The 74F647 and 74F649 Transceivers/Registers consist of bus transceiver circuits with open-collector outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a High logic level. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. The select (SAB, SBA) controls can multiplex stored and real-time (transparent mode) data. The DIR determines which bus will receive
data when the Output Enable, OE is active Low. In the isolation mode (Output Enable, OE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74F647 and 74F649. TYPICAL fm a x 65MHz 65MHz TYPICAL SUPPLY CURRENT (TOTAL) 125mA 125mA
TYPE 74F647 74F649
ORDERING INFORMATION
DESCRIPTION 24-pin plastic Slim DIP (300mil) 24-pin plastic SOL COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F647N, N74F649N N74F647D, N74F649D PKG DWG # SOT222-1 SOT137-1
PIN CONFIGURATION ­ 74F647
CPAB 1 SAB 2 DIR 3 24 VCC 23 CPBA 22 SBA 21 OE 20 B0 19 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7
PIN CONFIGURATION ­ 74F649
CPAB 1 SAB 2 DIR 3 24 VCC 23 CPBA 22 SBA 21 OE 20 B0 19 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7
A0 4 A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11 GND 12
A0 4 A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11 GND 12
SF01196
SF01196
1992 Feb 28
2
853-0876 05853
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647/74F649
LOGIC SYMBOL ­ 74F647
4 5 6 7 8 9 10 11
LOGIC SYMBOL ­ 74F649
4 5 6 7 8 9 10 11
A0 1 2 3 23 22 21 CPAB SAB DIR CPBA SBA OE B0
A1
A2
A3
A4
A5
A6
A7 A0 1 2 3 23 22 21 CPAB SAB DIR CPBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7 A1 A2 A3 A4 A5 A6 A7
B1
B2
B3
B4
B5
B6
B7
VCC=Pin 24 GND=Pin 12
20
19
18
17
16
15
14
13
SF01197
VCC=Pin 24 GND=Pin 12
20
19
18
17
16
15
14
13
SF01198
LOGIC SYMBOL ­ 74F647
21 3 23 C4 22 1 2 C6 G7 1 1 5 6D 1 5 6 7 8 9 10 11 7 7 1 1 2 5 4D 20 G5 G3 3EN1(BA) 3EN2(AB)
LOGIC SYMBOL ­ 74F648
21 3 G3 3EN1(BA) 3EN2(AB) 23 22 1 2 C6 G7 1 1 5 6D 19 18 17 16 15 14 13 1 5 6 7 8 9 10 11 7 7 1 1 2 5 4D 20 C4 G5
4
4
19 18 17 16 15 14 13
SF01199
SF01200
REAL TIME BUS TRANSFER BUS B TO BUS A
REAL TIME BUS TRANSFER BUS A TO BUS B
STORAGE FROM A, B, OR A AND B
TRANSFER STORED DATA TO A OR B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
OE L
DIR CPAB CPBA L X X
SAB X
SBA L
OE L
DIR CPAB CPBA H X X
SAB L
SBA X
OE X X H
DIR CPAB CPBA X X X X X
SAB X X X
SBA X X X
OE L L
DIR CPAB CPBA L H X H or L H or L X
SAB X H
SBA H X
SF01201
1992 Feb 28
3