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Details, datasheet, quote on part number:N74F676N
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Datasheet text preview:
INTEGRATED CIRCUITS
74F676 16-bit serial/parallel-in, serial-out shift register (3-State)
Product specification IC15 Data Handbook 1989 Apr 18
Philips Semiconductors
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
FEATURES
· 16-bit parallel-to-serial conversion · 16-bit serial-in, serial-out · Chip select control · Power supply current 48mA typical · Shift frequency 110MHz tyical · Available in 300mil-wide 24-pin Slim DIP package
DESCRIPTION
The 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the mode (M) input is High, information present on the parallel data (D0D15) inputs is entered on the falling edge of the clock pulse (CP) input signal. When M is Low, data is shifted out of the most significant bit position while information present on the serial (SI) input shifts into the least significant bit position. A High signal on the chip select (CS) input prevents both parallel and serial operations. The 16 bit shift register operates in one of three modes, as indicated in the shift register Function Table. Hold: A High signal on the Chip Select (CS) input prevents clocking and data is stored in the 16 registers. Serial load: Data present on the SI pin shifts into the register on the falling edge of CP. Data enters the Q0 position and shifts toward Q15 on successive clocks finally appearing on the SO pin. Parallel load: Data present on D0D15 is entered into the register on the falling edge of CP. The SO output represents the Q15 register output. To prevent false clocking, CP must be Low during a Low-to-High transition of CS.
PIN CONFIGURATION
CS CP NC SI M SO D0 D1 D2 1 2 3 4 5 6 7 8 9 24 VCC 23 D15 22 D14 21 D13 20 D12 19 D11 18 D10 17 D9 16 D8 15 D7 14 D6 13 D5
D3 10 D4 11 GND 12
SF01209
TYPE 74F676
TYPICAL fMAX 110MHz
TYPICAL SUPPLY CURRENT (TOTAL) 48mA
ORDERING INFORMATION
DESCRIPTION 24-Pin Plastic Slim DIP (300mil) 24-Pin Plastic SOL COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F676N N74F676D PKG DWG # SOT222-1 SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS D0D15 SI CS CP M SO Parallel data inputs Serial data input Chip Select input (active Low) Clock Pulse input (active falling edge) Mode select input Serial data output DESCRIPTION 74F(U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20µA/0.6mA 20µA/0.6mA 20µA/0.6mA 20µA/0.6mA 20µA/0.6mA 1mA/20mA
NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
1990 Apr 18
2
8530284 99394
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
LOGIC SYMBOL
4 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23
LOGIC DIAGRAM
CP CS M 2 1 5 4 7 D CP Q
SI D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 1 2 5 CS CP M SO D1 8 D CP Q SI D0
VCC = Pin 24 GND = Pin 12
CP 6
SF01210
D2
9
D
Q
LOGIC SYMBOL (IEEE/IEC)
D3 SRG16 5 0 M 1 1 2 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23 4 2, 3D 1, 3D 6 D10 18 D D9 17 D D8 16 D D7 15 D D6 14 D & C3/1 0 2 D4 10 D
CP Q
CP 11 D Q
CP 2, 3D D5 13 D Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP
SF01211
D11
19
D
Q
CP
FUNCTION TABLE
CONTROL INPUTS CS H L H L X = = = = M X L CP X Hold Shift/Serial load OPERATING MODE MODE
D12
20
D
Q
CP D13 21 D Q
L H Parallel load High voltage level Low voltage level Don't care High-to-Low transition of clock input
CP D14 22 D Q
CP D15 VCC = Pin 24 GND = Pin 12 23 D Q
6
SO
SF01212
1990 Apr 18
3
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