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Details, datasheet, quote on part number:NE5410F
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Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
DESCRIPTION
The NE5410/SE5410 are 10-bit Multiplying Digital-to-Analog Converters pin- and function-compatible with the industry-standard MC3410, but with improved performance. These are capable of high-speed performance, and are used as general-purpose building blocks in cost effective D/A systems. The NE/SE5410 provides complete 10-bit accuracy and differential non-linearity over temperature, and a wide compliance voltage range. Segmented current sources, in conjunction with an R/2R DAC, provide the binary weighted currents. The output buffer amplifier and voltage reference have been omitted to allow greater speed, lower cost, and maximum user flexibility.
PIN CONFIGURATION
F Package
VEE 1 GND 2 OUTPUT 3 D1 (MSB) 4 D2 5 D3 6 D4 7 D5 8 16 VREF+ 15 V
RE F 10
14 V CC 13 D (LSB) 12 D9 11 D8 10 D7 9 D6
TOP VIEW
FEATURES
· Pin- and function-compatible with MC3410 · 10-bit resolution and accuracy (±0.05%) · Guaranteed differential non-linearity over temperature · Wide compliance voltage range---2.5 to +2.5V · Fast settling time--250ns typical · Digital inputs are TTL- and CMOS-compatible · High-speed multiplying input slew rate--20mA/µs · Reference amplifier internally-compensated · Standard supply voltages +5V and -15V
APPLICATIONS
BLOCK DIAGRAM
MSB LSB D 1 D 2 D 3 D 4 D 5 D 6 D 7 D 8 D 9 D 10 4 5 6 7 8 9 10 11 12 13 3 CURRENT SWITCHES IO
LADDER TERMINATORS
R-2R LADDER
· Successive approximation A/D converters · High-speed, automatic test equipment · High-speed modems · Waveform generators · CRT displays · Strip CHART and X-Y plotters · Programmable power supplies · Programmable gain and attenuation
ORDERING INFORMATION
DESCRIPTION 16-Pin Ceramic Dual In-Line Package (CERDIP) 16-Pin Ceramic Dual In-Line Package (CERDIP)
VREF(+) VREF()
16 15 BIAS CIRCUITRY REFERENCE CURRENT AMPLIFIER 1 VEE 2 GND 14 V CC
TEMPERATURE RANGE 0 to +70°C -55 to +125°C
ORDER CODE NE5410F SE5410F
DWG # 0582B 0582B
August 31, 1994
767
853-0945 13721
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
ABSOLUTE MAXIMUM RATINGS
TA=+25°C, unless otherwise specified. SYMBOL VCC VEE VI VO IREF(16) VREF VREF(D) TA Digital input voltage Applied output voltage Reference current Reference amplifier inputs Reference amplifier differential inputs Operating temperature range SE5410 NE5410 TJ TSTG PD Junction temperature Ceramic package Storage temperature Maximum power dissipation TA=25°C (still-air)1 +150 -65 to +150 1190 °C °C mW -55 to +125 0 to +70 °C °C Power supply PARAMETER RATING +7.0 -18 +15 +4, -5.0 2.5 VCC, VEE 0.7 UNIT VDC VDC VDC VDC mA VDC VDC
NOTES: 1. Derate above 25°C at the following rate: F package at 9.5mW/°C
DC ELECTRICAL CHARACTERISTICS (Continued)
VCC=+5.0VDC, VEE=-15VDC, IREF=2.0mA, all digital inputs at high logic level. SE5410: TA=-55°C to +125°C, NE5410 Series: TA=0°C to +70°C, unless otherwise noted. SYMBOL R PARAMETER Relative accuracy (Error relative to full scale IO) Differential non-linearity Settling time to within ±1/2 LSB (all bits low to high) Propagation delay time Output full-scale current drift Digital input logic levels (all bits) High level, Logic "1" Low level, Logic "0" Digital input current (all bits) High level, VIH = 5.5V Low level, VIL = 0.8V Reference input bias current (Pin 15) Output current (all bits high) Output currents (all bits low) Output voltage compliance Reference amplifier slew rate Reference amplifier settling time Output current power supply sensitivity Output capacitance VO = 0 0 to 4.0mA, ±0.1% VREF = 2.000V, R16 = 1000 TA = 25°C TA = 25°C R < 0.050% relative to full-scale 20 2.0 0.003 25 0.01 3.937 1.0 3.996 0 2.0 Over temperature TEST CONDITIONS Over Temperature LIMITS Min Typ ±0.025 ±1/4 ±0.025 ±1/4 tS tPLH tPHL TCIO VIH TA = 25°C TA = 25°C 250 35 20 20 40 Max ±0.05 ±1/2 ±0.05 ±1/2 UNIT % LSB % LSB ns ns ppm/°C VDC 0.8 20 20 5.0 4.054 0.4 2.5 +2.5 µA µA mA µA VDC mA/µs µs %/% pF
IIH IIL IREF(15) IOH IOL VO SR IREF ST IREF PSRR() CO
August 31, 1994
768
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
DC ELECTRICAL CHARACTERISTICS
VCC=+5.0VDC, VEE=-15VDC, IREF=2.0mA, all digital inputs at high logic level. SE5410: TA=-55°C to +125°C, NE5410 Series: TA=0°C to +70°C, unless otherwise noted. SYMBOL CI ICC IEE VCC VEE PARAMETER Digital input capacitance (all bits high) Power supply current (all bits low) Power supply voltage range Power consumption TA = 25°C VO = 0 +4.75 14.25 TEST CONDITIONS LIMITS Min Typ 4.0 +2 12 +5.0 15 190 +4 18 +5.25 15.75 300 Max UNIT pF mA VDC mW
4.0 ICC IEEPOWER SUPPLY CURRENT (mA) 13 12 11 10 4 3 2 1 0 75 50 25 +ICC +VCC = +5V VEE = 15V IREF = 2mA IEE OUTPUT CURRENT (mA)
3.0 +VCC = +5V 2.0 VEE = 15V TA = 25°C 1.0 IREF = 2mA
0
1.0 5 3 1 0 1 3 COMPLIANCE VOLTAGE (VOLT) 5
0
25
50
75 100 125
TA (°C)
Figure 1. Output Current vs Output Compliance Voltage
OUTPUT COMPLIANCE VOLTAGE (VOLTS) 4.0 3.0 2.0 1.0 0 1.0 2.0 3.0 4.0 75 50 25 +VCC = +5V VEE = 15V IREF = 2mA
Figure 3. Power Supply Currents vs Temperature
0
25
50
75 100 125
TA (°C)
Figure 2. Maximum Output Compliance Voltage vs Temperature
Figure 4. Reference Amplifier Frequency Response An on-chip high slew reference current amplifier drives the R/2R ladder and segment decoder. The currents are scaled in such a way that, with all bits on, the maximum output current is two times 1023/1024 of the reference amplifier current, or nominally 3.996mA for a 2.000mA reference input current. The reference amplifier allows the user to provide a voltage input: out-board resistor R16 (see Figure 6) converts this voltage to a usable current. A current mirror doubles this reference current and feeds it to the segment decoder and resistor ladder. Thus, for a reference voltage of 2.0V and a 1k resistor tied to Pin 16, the full-scale current is
CIRCUIT DESCRIPTION
The NE5410 consists of four segment current sources which generate the 2 Most Significant Bits (MSBs), and an R/2R DAC implemented with ion-implanted resistors for scaling the remaining 8 Least Significant Bits (LSBs) (see Figure 5). This approach provides complete 10-bit accuracy without trimming. The individual bit currents are switched ON or OFF by fully-differential current switches. The switches use current steering for speed.
August 31, 1994
769
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