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Details, datasheet, quote on part number:P83C766BDP
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
P8xCx66 family Microcontrollers for PAL/SECAM TV with OSD and VST
Product specification File under Integrated Circuits, IC20 1999 Mar 10
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV with OSD and VST
CONTENTS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION MEMORY ORGANIZATION I/O FACILITY TIMERS AND EVENT COUNTERS REDUCED POWER MODE I2C-BUS SERIAL I/O INTERRUPT SYSTEM OSCILLATOR CIRCUITRY RESET CIRCUITRY PIN FUNCTION SELECTION ANALOG CONTROL ANALOG-TO-DIGITAL CONVERTERS (ADC) ON-SCREEN DISPLAY (OSD) EPROM PROGRAMMER SPECIAL FUNCTION REGISTERS ADDRESS MAP LIMITING VALUES CHARACTERISTICS PINNING CHARACTERIZATION PACKAGE OUTLINES SOLDERING DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
P8xCx66 family
1999 Mar 10
2
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV with OSD and VST
1 1.1 FEATURES P80C51 CPU core
P8xCx66 family
· 80C51 8-bit CPU · 64-kbyte Multiple Programming ROM (MTP ROM) · Two 16-bit timer/event counters · Crystal oscillator for system clock (up to 12 MHz) · 12 source, 12 vector interrupt structure with two priority levels · Enhanced architecture with: Non-page orientated instructions Direct addressing Four 8-byte RAM register banks Stack depth up to 128 bytes Multiply, divide, subtract and compare instructions. 1.2 P8xCx66 family 110 horizontal starting positions controlled by software Character size: 4 different character sizes on a line-by-line basis Character matrix: 12 × 18 with no spacing between characters Foreground colours: 8 on a character-by-character basis Background/shadowing modes: two primary modes TV mode and Frame mode on a frame basis. Each primary mode has four sub-modes on a line basis: Sub-mode 1: Superimpose (no background) Sub-mode 2: North-West shadowing Sub-mode 3: Box background Sub-mode 4: Border shadowing Background colours: 8 on a word-by-word basis, available in all four sub-modes Display RAM starting address is programmable; fast switching between banks of display (RAM) characters is possible through software control HSYNC driven PLL for OSD clock (4 to 12 MHz) Character blinking ratio: 1 : 1 Character blinking frequency: programmable using fVSYNC divisors of 32 and 64, on a character basis Flexible display format using the Carriage Return code and the Space codes Display RAM address post incremented each time new data is written into RAM Vertical jitter cancelling circuit to avoid unstable VSYNC leading edge mismatch with HSYNC signal OSD meshing. · Power-on reset · Packages: SDIL42 (PLCC68 for piggy-back only) · Operating voltage: 4.5 to 5.5 V · Operating temperature: -20 to +70 °C · System clock frequency: 4 to 12 MHz · OSD clock frequency: 4 to 12 MHz.
· ROM/RAM: see Table 1 · Pulse Width Modulated (PWM) outputs: One 14-bit PWM output for Voltage Synthesized Tuning (VST) Eight 7-bit PWM outputs for analog controls. · 3 Analog-to-Digital (ADC) inputs with 4-bit DAC and comparator · LED driver port: All I/O port lines with 10 mA LED drive capability (VO <1.0 V) Up to 5 LEDs can be driven at any one time. · Serial I/O: Multi-master I2C-bus interface Maximum I2C-bus frequency 400 kHz. · Watchdog timer · Improved EMC measures and slope controlled I/Os · OSD functions: Programmable VSYNC and HSYNC active levels Display RAM: 192 × 12 bits Display character fonts: 128 (126 customer fonts plus 2 reserved codes) 63 vertical starting positions controlled by software
1999 Mar 10
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