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Details, datasheet, quote on part number:P87C54X2FA
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| Part: | P87C54X2FA |
| Description: | P80C31X2/32X2; P80C51X2/52X2/54X2/58X2; P87C51X2/52X2/54X2/58X2; 80C51 8-bit Microcontroller Family 4K/8K/16K/32K ROM/otp 128B/256B RAM Low Voltage (2.7 to 5.5 V), Low Power, High Speed (30/33 MHz) |
| Company: | Philips Semiconductors |
| Datasheet: | Download P87C54X2FA datasheet File size : 414 kB |
| Request For quote: | Find where to buy P87C54X2FA
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Datasheet text preview:
INTEGRATED CIRCUITS
P80C31X2/32X2 P80C51X2/52X2/54X2/58X2 P87C51X2/52X2/54X2/58X2 80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz)
Product data Supersedes data of 2002 Sep 12 2003 Jan 24
Philips Semiconductors
Philips Semiconductors
Product data
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz)
P80C3xX2; P80C5xX2; P87C5xX2
DESCRIPTION
The Philips microcontrollers described in this data sheet are high-performance static 80C51 designs incorporating Philips' high-density CMOS technology with operation from 2.7 V to 5.5 V. They support both 6-clock and 12-clock operation. The P8xC31X2/51X2 and P8xC32X2/52X2/54X2/58X2 contain 128 byte RAM and 256 byte RAM respectively, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits. In addition, the devices are low power static designs which offer a wide range of operating frequencies down to zero. Two software
Type Memory
# of Timers
selectable modes of power reduction -- idle mode and power-down mode -- are available. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. Since the design is static, the clock can be stopped without loss of user data. Then the execution can be resumed from the point the clock was stopped.
SELECTION TABLE
For applications requiring more ROM and RAM, as well as more on-chip peripherals, see the P89C66x and P89C51Rx2 data sheets.
Timers
Serial Interfaces
Default Clock Rate ADC bits/ch. Optional Clock Rate Max. Freq. at 6-clk / 12-clk (MHz) 30/33 30/33 30/33 30/33 30/33 30/33 30/33 30/33 30/33 30/33 Freq. Range at 3V (MHz) 016 016 016 016 016 016 016 016 016 016 Freq. Range at 5V (MHz) 030/33 030/33 030/33 030/33 030/33 030/33 030/33 030/33 030/33 030/33
Interrupts (External) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2)
P87C58X2 P80C58X2 P87C54X2 P80C54X2 P87C52X2 P80C52X2 P87C51X2 P80C51X2 P80C32X2 P80C31X2
256B 256B 256B 256B 256B 256B 128B 128B 256B 128B
32K 16K 8K 4K
32K 16K 8K 4K
3 3 3 3 3 3 3 3 3 3
n n n n n n n n n n
32 32 32 32 32 32 32 32 32 32
Program Security n n n n n n n n
I/O Pins
UART
Flash
PWM
ROM
RAM
CAN
OTP
PCA
WD
I 2C
SPI
12clk 12clk 12clk 12clk 12clk 12clk 12clk 12clk 12clk 12clk
6-clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk
NOTE: 1. I2C = Inter-Integrated Circuit Bus; CAN = Controller Area Network; SPI = Serial Peripheral Interface; PCA = Programmable Counter Array; ADC = Analog-to-Digital Converter; PWM = Pulse Width Modulation
2003 Jan 24
2
853-2337 29260
Philips Semiconductors
Product data
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz)
P80C3xX2; P80C5xX2; P87C5xX2
· PLCC, DIP, TSSOP or LQFP packages · Extended temperature ranges · Dual Data Pointers · Security bits:
ROM (2 bits) OTP (3 bits)
FEATURES
· 80C51 Central Processing Unit
4 kbytes ROM/EPROM (P80/P87C51X2) 8 kbytes ROM/EPROM (P80/P87C52X2) 16 kbytes ROM/EPROM (P80/P87C54X2) 32 kbytes ROM/EPROM (P80/P87C58X2) 128 byte RAM (P80/P87C51X2 and P80C31X2) 256 byte RAM (P80/P87C52/54X2/58X2 and P80C32X2) Boolean processor Fully static operation Low voltage (2.7 V to 5.5 V at 16 MHz) operation
· 12-clock operation with selectable 6-clock operation (via software
or via parallel programmer)
· Memory addressing capability
Up to 64 kbytes ROM and 64 kbytes RAM
· Encryption array - 64 bytes · Four interrupt priority levels · Six interrupt sources · Four 8-bit I/O ports · Full-duplex enhanced UART
Framing error detection Automatic address recognition
· Power control modes:
Clock can be stopped and resumed Idle mode Power-down mode
· Three 16-bit timers/counters T0, T1 (standard 80C51) and
additional T2 (capture and compare)
· CMOS and TTL compatible · Two speed ranges at VCC = 5 V
0 to 30 MHz with 6-clock operation 0 to 33 MHz with 12-clock operation
· Programmable clock-out pin · Asynchronous port reset · Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock
mode)
· Wake-up from Power Down by an external interrupt.
2003 Jan 24
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