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Details, datasheet, quote on part number:P87C554SBBD
 
 
Part:P87C554SBBD
Category:Microcontrollers => 8 bit => 80C51 architecture
Description:80C554/87C554; 80C51 8-bit Microcontroller - 6 Clock Operation 16K/512 OTP/ROMless, 7 Channel 10 Bit A/D, I2C, Pwm, Capture/compare, High I/O, 64L LQFP;; Package: SOT314-2 (LQFP64)
Company:Philips Semiconductors
Datasheet:Download P87C554SBBD datasheet   File size : 398 kB
Request For quote:  Find where to buy P87C554SBBD
 



Datasheet text preview:
INTEGRATED CIRCUITS
80C554/87C554
80C51 8-bit microcontroller ­ 6 clock operation
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
Product data Supersedes data of 2000 Nov 10 2003 Jan 28
Philips Semiconductors
Philips Semiconductors
Product data
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
80C51 8-bit microcontroller ­ 6-clock operation
80C554/87C554
8DESCRIPTION
This data sheet describes the 6 clock version of the 8xC554. This device is only available in 64L LQFP. The 8xC554 Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 87C554 has the same instruction set as the 80C51. Three versions of the derivative exist:
· 80C51 central processing unit · 16k × 8 EPROM expandable externally to 64 kbytes · An additional 16-bit timer/counter coupled to four capture registers
and three compare registers
FEATURES
· 80C554--ROMless version · 87C554--16 kbytes EPROM
The 87C554 contains a 16k × 8 non-volatile EPROM, a 512 × 8 read/write data memory, five 8-bit I/O ports, one 8-bit input port, two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture and compare latches, a 15-source, four-priority-level, nested interrupt structure, an 7-input ADC, a dual DAC pulse width modulated interface, two serial interfaces (UART and I2C-bus), a "watchdog" timer and on-chip oscillator and timing circuits. For systems that require extra capability, the 8xC554 can be expanded using standard TTL compatible memories and logic. In addition, the 8xC554 has two software selectable modes of power reduction--idle mode and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial ports, and interrupt system to continue functioning. Optionally, the ADC can be operated in Idle mode. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45 two-byte, and 17 three-byte. With an 8-MHz crystal, 58% of the instructions are executed in 0.75 µs and 40% in 1.5 µs. Multiply and divide instructions require 3 µs.
· Two standard 16-bit timer/counters · 512 × 8 RAM, expandable externally to 64 kbytes · Capable of producing eight synchronized, timed outputs · A 10-bit ADC with seven multiplexed analog inputs · Fast 8-bit ADC option ­ 9 µS at 16 MHz · Two 8-bit resolution, pulse width modulation outputs · Five 8-bit I/O ports plus one 8-bit input port shared with analog
inputs
· I2C-bus serial I/O port with byte oriented master and slave
functions
· On-chip watchdog timer · Extended temperature ranges · Full static operation ­ 0 to 16 MHz · Operating voltage range: 2.7 V to 5.5 V (0 to 8 MHz) and
4.5 V to 5.5 V (8 to 16 MHz) commercial temperature
· Security bits:
­ ROM ­ 2 bits ­ OTP/EPROM ­ 3 bits
· Four interrupt priority levels · 15 interrupt sources · Full-duplex enhanced UART
­ Framing error detection ­ Automatic address recognition
· Power control modes
­ Clock can be stopped and resumed ­ Idle mode ­ Power down mode
· Second DPTR register · EMI reduction ­ 6 clock operation and ALE inhibit · Programmable I/O pins · Wake-up from power-down by external interrupts · Software reset · Power-on detect reset · ADC charge pump disable · ONCE mode · ADC active in Idle mode
2003 Jan 28
2
853-2408 29338
Philips Semiconductors
Product data
80C51 8-bit microcontroller ­ 6-clock operation
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
80C554/87C554
ORDERING INFORMATION
OTP/EPROM P87C554SBBD P87C554SFBD ROMless P80C554SBBD P80C554SFBD TEMPERATURE °C AND PACKAGE 0 to +70, Low Profile Quad Flat Package ­40 to +85, Low Profile Quad Flat Package FREQ. (MHz) 16 16 DRAWING NUMBER SOT314­2 SOT314­2
PART NUMBER DERIVATION
DEVICE NUMBER P87C554 OTP P80C554 ROMless S = 16 MHz 16 MHz OPERATING FREQUENCY MAX TEMPERATURE RANGE B= 0_C to 70_C F = ­40_C to +85_C PACKAGE BD=64L LQFP LQFP
BLOCK DIAGRAM
T0 3 T1 3 INT0 3 INT1 3 V DD VS S PWM0 PWM1 AVSS
AVDD
AVREF ADC0-7 SDA
SCL 1 1
­+
STADC
5
XTAL1 XTAL2 EA ALE PSEN 3 3 RD 0 AD0-7 2 A8-15 PARALLEL I/O PORTS AND EXTERNAL BUS SERIAL UART PORT 8-BIT PORT FOUR 16-BIT CAPTURE LATCHES 16 WR T0, T1 TWO 16-BIT TIMER/EVENT COUNTERS PROGRAM MEMORY 16k x 8 OTP/ROM DATA MEMORY 512 x 8 RAM DUAL PWM ADC SERIAL I2C PORT
CPU
80C51 CORE EXCLUDING ROM/RAM
8-BIT INTERNAL BUS
T2 16-BIT TIMER/ EVENT COUNTERS
16
T2 16-BIT COMPARATORS WITH REGISTERS
COMPARATOR OUTPUT SELECTION
T3 WATCHDOG TIMER
3 P0 P1 P2 P3 TxD
3 RxD P5 P4 CT0I-CT3I
1
1 T2 RT2
1
4 CMSR0-CMSR5 CMT0, CMT1 RST EW
0 1 2
ALTERNATE FUNCTION OF PORT 0 ALTERNATE FUNCTION OF PORT 1 ALTERNATE FUNCTION OF PORT 2
3 4 5
ALTERNATE FUNCTION OF PORT 3 ALTERNATE FUNCTION OF PORT 4 ALTERNATE FUNCTION OF PORT 5
SU00951
2003 Jan 28
3