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Details, datasheet, quote on part number:P89C51RA2
 
 
Part:P89C51RA2
Category:Microcontrollers => 8 bit => 80C51 architecture
Description:P89C51RA2xx/RB2xx/RC2xx/RD2xx; 80C51 8-bit Flash Microcontroller Family 8KB/16KB/32KB/64KB Isp/iap Flash With 512B/512B/512B/1KB RAM;; Package: SOT187-2 (PLCC44), SOT389-1 (LQFP44)
Company:Philips Semiconductors
Datasheet:Download P89C51RA2 datasheet   File size : 412 kB
Request For quote:  Find where to buy P89C51RA2
 



Datasheet text preview:
INTEGRATED CIRCUITS
P89C51RA2xx/RB2xx/RC2xx/RD2xx 80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
Preliminary data
Supersedes data of 2002 May 20
2002 Jul 18
Philips Semiconductors
Philips Semiconductors
Preliminary data
80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
P89C51RA2/RB2/RC2/RD2xx
DESCRIPTION
The P89C51RA2/RB2/RC2/RD2xx contains a non-volatile 8KB/16KB/32KB/64KB Flash program memory that is both parallel programmable and serial In-System and In-Application Programmable. In-System Programming (ISP) allows the user to download new code while the microcontroller sits in the application. In-Application Programming (IAP) means that the microcontroller fetches new program code and reprograms itself while in the system. This allows for remote programming over a modem link. A default serial loader (boot loader) program in ROM allows serial In-System programming of the Flash memory via the UART without the need for a loader in the Flash code. For In-Application Programming, the user program erases and reprograms the Flash memory by use of standard routines contained in ROM. T h e device supports 6-clock/12-clock mode selection by p r o g r a m m i n g a Flash bit using parallel programming or I n - S y s t e m Programming. In addition, an SFR bit (X2) in the clock c o n t r o l register (CKCON) also selects between 6-clock/12-clock mode. Additionally, when in 6-clock mode, peripherals may use either 6 clocks per machine cycle or 12 clocks per machine cycle. This choice is available individually for each peripheral and is selected by bits in the CKCON register. This device is a Single-Chip 8-Bit Microcontroller manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The instruction set is 100% compatible with the 80C51 instruction set. The device also has four 8-bit I/O ports, three 16-bit timer/event counters, a multi-source, four-priority-level, nested interrupt structure, an enhanced UART and on-chip oscillator and timing circuits. The added features of the P89C51RA2/RB2/RC2/RD2xx make it a powerful microcontroller for applications that require pulse width modulation, high-speed I/O and up/down counting capabilities such as motor control.
FEATURES
· 80C51 Central Processing Unit · On-chip Flash Program Memory with In-System Programming
(ISP) and In-Application Programming (IAP) capability
· Boot ROM contains low level Flash programming routines for
downloading via the UART
· Can be programmed by the end-user application (IAP) · Parallel programming with 87C51 compatible hardware interface
to programmer
· Supports 6-clock/12-clock mode via parallel programmer (default
clock mode after ChipErase is 12-clock)
· 6-clock/12-clock mode Flash bit erasable and programmable via
ISP
· 6-clock/12-clock mode programmable "on-the-fly" by SFR bit · Peripherals (PCA, timers, UART) may use either 6-clock or
12-clock mode while the CPU is in 6-clock mode
· Speed up to 20 MHz with 6-clock cycles per machine cycle
(40 MHz equivalent performance); up to 33 MHz with 12 clocks per machine cycle
· Fully static operation · RAM expandable externally to 64 kbytes · Four interrupt priority levels · Seven interrupt sources · Four 8-bit I/O ports · Full-duplex enhanced UART
­ Framing error detection ­ Automatic address recognition
· Power control modes
­ Clock can be stopped and resumed ­ Idle mode ­ Power down mode
· Programmable clock-out pin · Second DPTR register · Asynchronous port reset · Low EMI (inhibit ALE) · Programmable Counter Array (PCA)
­ PWM ­ Capture/compare
2002 Jul 18
2
Philips Semiconductors
Preliminary data
80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
P89C51RA2/RB2/RC2/RD2xx
SELECTION TABLE
Type Memory
# of Timers
Timers
Serial Interfaces
Default Clock Rate 1 ADC bits/ch. Interrupts (Ext.)/Levels Reset active low/high? Optional Clock Rate1 Max. Freq. at 6-clk / 12-clk (MHz) 20/33 20/33 20/33 20/33 Freq. Range at 3V (MHz) ­ ­ ­ ­ Freq. Range at 5V (MHz) 0-20/33 0-20/33 0-20/33 0-20/33
P89C51RD2xx P89C51RC2xx P89C51RB2xx P89C51RA2xx
1K 512B 512B 512B
­ ­ ­ ­
­ ­ ­ ­
64K 32K 16K 8K
4 4 4 4
­ ­ ­ ­
­ ­ ­ ­
­ ­ ­ ­
­ ­ ­ ­
32 32 32 32
7(2)/4 7(2)/4 7(2)/4 7(2)/4
Program Security
I/O Pins
UART
Flash
PWM
ROM
RAM
CAN
OTP
PCA
WD
I 2C
SPI
12-clk 12-clk 12-clk 12-clk
6-clk 6-clk 6-clk 6-clk
H H H H
NOTE: 1. P89C51Rx2Hxx devices have a 6-clk default clock rate (12-clk optional). Please also see Device Comparison Table.
DEVICE COMPARISON TABLE
Item Type description Programming algorithm Clock mode (I) 1st generation of Rx2 devices P89C51Rx2Hxx(x) When using a parallel programmer, be sure to select P89C51Rx2Hxx(x) devices 6-clk default, OTP configuration bit to program to 12-clk mode using parallel programmer (cannot be programmed back to 6-clk) N/A N/A Two 8-Kbyte blocks 1­3 16-Kbyte blocks 2nd generation of Rx2 devices (this data sheet) P89C51Rx2xx(x) When using a parallel programmer, be sure to select P89C51Rx2xx(x) devices (no more letter `H') 12-clk default, Flash configuration bit to program to 6-clk mode using parallel programmer or ISP (can be reprogrammed) 6-clock/12-clock mode programmable "on the fly" by SFR bit X2 (CKCON.0) Peripherals can be run in 12-clk mode while CPU runs in 6-clk mode 2­16 4-Kbyte blocks Difference No more letter `H' Different programming algorithm due to process change More flexibility for the end user, more compatibility to older P89C51Rx+ parts Clock mode can be changed by software More flexibility, lower power consumption More flexibility
Clock mode (II) Peripheral clock modes Flash block structure
ORDERING INFORMATION
PART ORDER ORDER NUMBER1 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. P89C51RA2BA/01 P89C51RA2BBD/01 P89C51RB2BA/01 P89C51RB2BBD/01 P89C51RC2BN/01 P89C51RC2BA/01 P89C51RC2FA/01 P89C51RC2BBD/01 P89C51RC2FBD/01 P89C51RD2BN/01 P89C51RD2BA/01 P89C51RD2BBD/01 P89C51RD2FA/01 MEMORY FLASH 8 KB 8 KB 16 KB 16 KB 32 KB 32 KB 32 KB 32 KB 32 KB 64 KB 64 KB 64 KB 64 KB RAM 512 B 512 B 512 B 512 B 512 B 512 B 512 B 512 B 512 B 1024 B 1024 B 1024 B 1024 B TEMPERATURE RANGE (°C) AND PACKAGE 0 to +70, PLCC 0 to +70, LQFP 0 to +70, PLCC 0 to +70, LQFP 0 to +70, PDIP 0 to +70, PLCC ­40 to +85, PLCC 0 to +70, LQFP ­40 to +85, LQFP 0 to +70, PDIP 0 to +70, PLCC 0 to +70, LQFP ­40 to +85, PLCC VOLTAGE RANGE 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V 4.5­5.5 V FREQUENCY (MHz) 6-CLOCK MODE 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 0 to 20 MHz 12-CLOCK MODE 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz 0 to 33 MHz DWG # SOT187-2 SOT389-1 SOT187-2 SOT389-1 SOT129-1 SOT187-2 SOT187-2 SOT389-1 SOT389-1 SOT129-1 SOT187-2 SOT389-1 SOT187-2
NOTE: 1. The Part Marking will not include the "/01".
2002 Jul 18
3