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Part: PCA9534

Category:
 Interface and Interconnect
   -> I2C

Description: 8-bit I2C And Smbus, Low Power I/o Port With Interrupt<<<>>>the PCA9534 is A16-pin CMOS Device That Provide 8 Bits of General Purpose Parallel Input/output (GPIO) Expansion For i C/smbus Applications And Was Developed to Enhance The Philips Family of i C I/o Expanders. The Improvements Include Higher Drive Capability, 5V I/o Tolerance, Lower Supply Current, Individual I/o Configuration, 400 KHZ Clock Frequency, And Smaller Packaging. I/o Expanders Provide a Simple Solution When Additional I/o is Needed For Acpi Power Switches, Sensors, Pushbuttons, Leds, Fans, Etc.. <<<>>><<<>>>The PCA9534 Consist of an 8-bit Configuration Register (Input or Output Selection); 8-bit Input Register, 8-bit Output Register And an 8-bit Polarity Inversion Register (Active High or Active Low Operation). The System Master CAN Enable The I/os as Either Inputs or Outputs BY Writing to The I/o Configuration Bits. The Data For Each Input or Output is Kept in The Corresponding Input or Output Register. The Polarity of The Input Port Register CAN be Inverted With The Polarity Inversion Register. All Registers CAN be Read BY The System Master. Although Pin to Pin And i C Address Compatible With The PCF8574 Series, Software Changes Are Required Due to The Enhancements And Are Discussed in Application Note AN469. <<<>>><<<>>>The PCA9534 is Identical to The PCA9554 Except For The Removal of The Internal I/o Pull-up Resistor Which Greatly Reduces Power Consumption When The I/os Are Held Low. <<<>>><<<>>>The PCA9534 Open-drain Interrupt Output is Activated When Any Input State Differs From Its Corresponding Input Port Register State And is Used to Indicate to The System Master That an Input State Has Changed. The Power-on Reset Sets The Registers to TheIR Default Values And Initializes The Device State Machine. <<<>>><<<>>>Three Hardware Pins (A0, A1, A2) Vary The Fixed i C Address And Allow up to Eight Devices to Share The Same i C/SMBus. <<<>>><<<>>> <<<>>> Features 8-bit i C Gpio <<<>>>Operating Power Supply Voltage Range of 2.3 to 5.5 V <<<>>>5 V Tolerant I/os <<<>>>Polarity Inversion Register <<<>>>Active Low Interrupt Output <<<>>>Low Stand-by Current <<<>>>Noise Filter on Scl/sda Inputs <<<>>>No Glitch on Power-up <<<>>>Internal Power-on Reset <<<>>>8 I/o Pins Which Default to 8 Inputs <<<>>>0 to 400 KHZ Clock Frequency <<<>>>ESD Protection Exceeds 2000 V HBM Per JESD22-A114, 200 V MM Per JESD22-A115 And 1000 V CDM Per JESD22-C101 <<<>>>Latch-up Testing is Done to Jesdec Standard JESD78 Which Exceeds 100 ma <<<>>>Offered in Three Different Packages: SO16, TSSOP16, And HVQFN16

Company: Philips Semiconductors

Datasheet: Download PCA9534 datasheet     File size : 110 kB

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Datasheet text preview:
INTEGRATED CIRCUITS
PCA9534 8-bit I2C and SMBus, low power I/O port with interrupt
Product data 2003 Dec 02
Philips Semiconductors
Philips Semiconductors
Product data
8-bit I2C and SMBus low power I/O port with interrupt
PCA9534
DESCRIPTION
The PCA9534 is a16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C/SMBus applications and was developed to enhance the Philips family of I@C I/O expanders. The improvements include higher drive capability, 5V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, pushbuttons, LEDs, fans, etc..
FEATURES
· 8-bit I2C GPIO · Operating power supply voltage range of 2.3 to 5.5 V · 5 V tolerant I/Os · Polarity inversion register · Active low interrupt output · Low stand-by current · Noise filter on SCL/SDA inputs · No glitch on power-up · Internal power-on reset · 8 I/O pins which default to 8 inputs · 0 to 400 kHz clock frequency · ESD protection exceeds 2000 V HBM per JESD22-A114, · Latch-up testing is done to JESDEC Standard JESD78 which · Offered in three different packages: SO16, TSSOP16, and
HVQFN16 exceeds 100 mA 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
The PCA9534 consist of an 8-bit Configuration register (Input or Output selection); 8-bit Input register, 8-bit Output register and an 8-bit Polarity inversion register (Active high or Active low operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the input port register can be inverted with the Polarity Inversion Register. All registers can be read by the system master. Although pin to pin and I2C address compatible with the PCF8574 series, software changes are required due to the enhancements and are discussed in Application Note AN469. The PCA9534 is identical to the PCA9554 except for the removal of the internal I/O pull-up resistor which greatly reduces power consumption when the I/Os are held LOW. The PCA9534 open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine. Three hardware pins (A0, A1, A2) vary the fixed I2C address and allow up to eight devices to share the same I2C/SMBus.
ORDERING INFORMATION
PACKAGES 16-Pin Plastic SO (wide) 16-Pin Plastic TSSOP TEMPERATURE RANGE -40 to +85 °C -40 to +85 °C ORDER CODE PCA9534D PCA9534PW TOPSIDE MARK PCA9534D PCA9534 DRAWING NUMBER SOT162-1 SOT403-1 SOT629-1
16-Pin Plastic HVQFN -40 to +85 °C PCA9534BS 9534 Standard packing quantities and other packing data are available at www.philipslogic.com/packaging. I2C is a trademark of Philips Semiconductors Corporation. SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I2C patent.
2003 Dec 02
2
Philips Semiconductors
Product data
8-bit I2C and SMBus low power I/O port with interrupt
PCA9534
PIN CONFIGURATION -- SO, TSSOP
A0 1 A1 2 16 VDD 15 SDA 14 SCL 13 INT 12 I/O7 11 I/O6 10 I/O5 9 I/O4
PIN CONFIGURATION -- HVQFN
A1 16 A0 15 VDD 14 SDA 13 12 SCL 11 INT 10 I/O7 9 5 6 7 8 I/O6 I/O5
A2 I/O0 I/O1 I/O2
1 2 3 4
A2 3 I/O0 4 I/O1 5 I/O2 6 I/O3 7 V SS 8
I/O3 su01410
VSS I/O4
Figure 1. Pin configuration -- SO, TSSOP
TOP VIEW
su01670
Figure 2. Pin Configuration -- HVQFN
PIN DESCRIPTION
SO. TSSOP PIN NUMBER 1 2 3 4-7 8 9-12 13 14 15 16 HVQFN PIN NUMBER 15 16 1 2-5 6 7-10 11 12 13 14 SYMBOL A0 A1 A2 I/O0-3 VSS I/O4-7 INT SCL SDA VDD FUNCTION Address input 0 Address input 1 Address input 2 I/O0 to I/O3 Supply ground I/O4 to I/O7 Interrupt output (open drain) Serial clock line Serial data line Supply voltage
BLOCK DIAGRAM
A0 A1 A2 SCL SDA INPUT FILTER I2C/SMBUS CONTROL 8-BIT INPUT/ OUTPUT PORTS I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 VDD POWER-ON RESET V SS LP FILTER NOTE: ALL I/Os ARE SET TO INPUTS AT RESET SU01783 INT VCC
WRITE pulse READ pulse
Figure 3. Block diagram
2003 Dec 02
3


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