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Part: PCD8582D-2
Category:
Communication
-> Telephony
-> Line Interface
Description: 256 X 8-bit CMOS EePROMs With I2c-bus Interface
Company: Philips Semiconductors
Datasheet: Download PCD8582D-2 datasheet File size : 491 kB
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
PCX8582X-2 Family 256 x 8-bit CMOS EEPROMS with I2C-bus interface
Product specification Supersedes data of February 1992 File under Integrated Circuits, IC12 December 1994
Philips Semiconductors
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMS with I2C-bus interface
FEATURES · Low power CMOS maximum active current 2.0 mA maximum standby current 10 µA (at 6.0 V), typical 4 µA · Non-volatile storage of 2-Kbits organized as 256 × 8-bits · Single supply with full operation down to 2.5 V · On-chip voltage multiplier · Serial input/output · Write operations byte write mode 8-byte page write mode (minimizes total write time per byte) · Read operations sequential read random read · Internal timer for writing (no external components) · Power-on reset · High reliability by using a redundant storage code · Endurance >500 k E/W-cycles at Tamb = 22 °C · 40 years non-volatile data retention time (typ.) · Pin and address compatible to PCX8570, PCF8571, PCF8572 and PCF8581 PCX8494X-2, PCX8598X-2 -Family. QUICK REFERENCE DATA SYMBOL VDD IDDR PARAMETER supply voltage supply current READ fSCL = 100 kHz VDD = 3 V VDD = 6 V IDDW supply current ERASE/WRITE fSCL = 100 kHz VDD = 3 V VDD = 6 V IDDSB supply current STANDBY VDD = 3 V VDD = 6 V CONDITIONS I2C-bus DESCRIPTION
PCX8582X-2 Family
The PCX8582X-2 is a 2-Kbit (256 × 8-bit) floating gate electrically erasable programmable read only memory (EEPROM). By using an internal redundant storage code it is fault tolerant to single bit errors. This feature dramatically increases reliability compared to conventional EEPROM memories. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. As data bytes are received and transmitted via the serial I2C-bus, a package using eight pins is sufficient. Up to eight PCX8582X-2 devices may be connected to the I2C-bus. Chip select is accomplished by three address inputs (A0, A1, A2). Timing of the ERASE/WRITE cycle is carried out internally, thus no external components are required. Pin 7 (PTC) must be connected to either VDD or left open-circuit. There is an option of using an external clock for timing the length of an ERASE/WRITE cycle.
MIN. 2.5 - - - - - -
MAX. 6.0 60 200 0.6 2.0 3.5 10 V
UNIT
µA µA mA mA µA µA
December 1994
2
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMS with I2C-bus interface
ORDERING INFORMATION TYPE NUMBER PCF8582C-2P PCD8582D-2P PCF8582E-2P PCA8582F-2P PCF8582C-2T PCD8582D-2T PCF8582E-2T PCA8582F-2T DEVICE SELECTION Table 1 Device selection code DEVICE CODE b71 1 b6 0 b5 1 b4 0 b3 A2 SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 PACKAGE NAME DIP8 DESCRIPTION plastic dual in-line package; 8 leads (300 mil) VERSION SOT97-1
PCX8582X-2 Family
TEMPERATURE (°C) MIN. -40 -25 -40 -40 -40 -25 -40 -40 MAX. +85 +70 +85 +125 +85 +70 +85 +125
SUPPLY (V) MIN. 2.5 3.0 4.5 4.5 2.5 3.0 4.5 4.5 MAX. 6.0 6.0 5.5 5.5 6.0 6.0 5.5 5.5
SELECTION Bit Device Note 1. The MSB b7 is sent first. Table 2
CHIP ENABLE b2 A1 b1 A0
R/W b0 R/W
Endurance and data retention guarantees DEVICE ENDURANCE E/W CYCLES 500 000(1) DATA RETENTION YEARS 40
PCF8582C-2; PCA8582F-2 Note
1. At the time of publication of this data sheet the statistical history was not yet sufficient to guarantee 1000000000 E/W cycle performance for these types.
December 1994
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