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Details, datasheet, quote on part number:PHB24N03T
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| Part: | PHB24N03T |
| Category: | Discrete => Transistors => FETs (Field Effect Transistors) => MOSFETs => N-Channel |
| Description: | Trenchmos Transistor Standard Level Fet: 30v, 24a |
| Company: | Philips Semiconductors |
| Datasheet: | Download PHB24N03T datasheet File size : 53 kB |
| Request For quote: | Find where to buy PHB24N03T
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Datasheet text preview:
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
GENERAL DESCRIPTION
N-channel enhancement mode standard level field-effect power transistor in a plastic envelope suitable for surface mounting using 'trench' technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in DC-DC converters and general purpose switching applications.
PHB24N03T
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 30 24 60 175 56 UNIT V A W °C m
PINNING - SOT404
PIN 1 2 3 mb gate drain source drain DESCRIPTION
PIN CONFIGURATION
mb
SYMBOL
d
g
2 1 3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 k Tmb = 25 °C Tmb = 100 °C Tmb = 25 °C Tmb = 25 °C MIN. - 55 MAX. 30 30 20 24 20 96 60 175 UNIT V V V A A A W °C
THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS pcb mounted, minimum footprint TYP. 50 MAX. 2.5 UNIT K/W K/W
ESD LIMITING VALUE
SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage, all pins CONDITIONS Human body model (100 pF, 1.5 k) MIN. MAX. 2 UNIT kV
September 1997
1
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
STATIC CHARACTERISTICS
Tj= 25°C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS ±V(BR)GSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55°C VDS = VGS; ID = 1 mA Tj = 175°C Tj = -55°C VDS = 30 V; VGS = 0 V; VGS = ±10 V; VDS = 0 V Tj = 175°C MIN. 30 27 2.0 1.0 16 TYP. 3.0 0.05 0.02 50 -
PHB24N03T
MAX. 4.0 4.4 10 500 1 20 56 104
UNIT V V V V V µA µA µA µA V m m
Tj = 175°C Gate source breakdown voltage IG = ±1 mA; Drain-source on-state VGS = 10 V; ID = 25 A resistance VGS = 10 V; ID = 12 A; Tj = 175°C
DYNAMIC CHARACTERISTICS
Tj = 25°C unless otherwise specified SYMBOL gfs Qg(tot) Qgs Qgd Ciss Coss Crss td on tr td off tf Ld Ld Ls PARAMETER Forward transconductance Total gate charge Gate-source charge Gate-drain (Miller) charge Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VDS = 25 V; ID = 12 A ID = 10 A; VDD = 30 V; VGS = 10 V MIN. 2 TYP. 7.2 13 3.2 5.4 385 152 85 9 40 15 20 3.5 4.5 7.5 MAX. UNIT S nC nC nC pF pF pF ns ns ns ns nH nH nH
VGS = 0 V; VDS = 25 V; f = 1 MHz
VDD = 30 V; ID = 25 A; VGS = 10 V; RG = 10 Resistive load Measured from tab to centre of die Measured from drain lead solder point to centre of die Measured from source lead solder point to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25°C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 25 A; VGS = 0 V IF = 25 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 25 V TYP. 0.99 154 0.5 MAX. 24 96 1.2 UNIT A A V ns µC
September 1997
2
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
AVALANCHE LIMITING VALUE
SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 12 A; VDD 25 V; VGS = 10 V; RGS = 50 ; Tmb = 25 °C MIN. TYP. -
PHB24N03T
MAX. 15
UNIT mJ
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
Normalised Power Derating
100
ID, Drain current (Amps)
V )= DS /ID
PHP24N03T
RD
S(
ON
10 us
100 us 10 DC 1 ms 10 ms Tmb = 25 C
0
20
40
60
80 100 Tmb / C
120
140
160
180
1
1
10 VDS, Drain-source voltage (Volts)
100
Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 °C = f(Tmb)
Normalised Current Derating
Fig.3. Safe operating area. Tmb = 25 °C ID & IDM = f(VDS); IDM single pulse; parameter tp
Transient thermal impedance, Zth j-mb (K/W) PHP24N03T
120 110 100 90 80 70 60 50 40 30 20 10 0
ID%
10
D= 1 0.5 0.2 0.1 0.05 0.1 0.02
P D tp D= tp T t
0
T
0.01
0
20
40
60
80 100 Tmb / C
120
140
160
180
1us
10us 100us 1ms 10ms pulse width, tp (s)
0.1s
1s
10s
Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 °C = f(Tmb); conditions: VGS 10 V
Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T
September 1997
3
Rev 1.100
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