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Details, datasheet, quote on part number:PHB42N03LT
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| Part: | PHB42N03LT |
| Category: | Discrete => Transistors => FETs (Field Effect Transistors) => MOSFETs => N-Channel |
| Description: | PHP42N03LT/PHB42N03LT; Trenchmos (tm) Transistor Logic Level Fet |
| Company: | Philips Semiconductors |
| Datasheet: | Download PHB42N03LT datasheet File size : 53 kB |
| Request For quote: | Find where to buy PHB42N03LT
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Datasheet text preview:
Philips Semiconductors
Product specification
TrenchMOSTM transistor Logic level FET
FEATURES
· 'Trench' technology · Very low on-state resistance · Fast switching · Stable off-state characteristics · High thermal cycling performance · Low thermal resistance
PHP42N03LT, PHB42N03LT
SYMBOL
d
QUICK REFERENCE DATA VDSS = 30 V ID = 42 A
g
RDS(ON) 26 m (VGS = 5 V) RDS(ON) 23 m (VGS = 10 V)
s
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using 'trench' technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. The PHP42N03LT is supplied in the SOT78 (TO220AB) conventional leaded package. The PHB42N03LT is supplied in the SOT404 surface mounting package.
PINNING
PIN 1 2 3 tab gate drain 1 source drain DESCRIPTION
SOT78 (TO220AB)
tab
SOT404
tab
2
1 23
1
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 °C to 175°C Tj = 25 °C to 175°C; RGS = 20 k Tmb = 25 °C; VGS = 5 V Tmb = 100 °C; VGS = 5 V Tmb = 25 °C Tmb = 25 °C MIN. - 55 MAX. 30 30 ± 15 42 30 168 86 175 UNIT V V V A A A W °C
November 1998
1
Rev 1.400
Philips Semiconductors
Product specification
TrenchMOSTM transistor Logic level FET
THERMAL RESISTANCES
SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS
PHP42N03LT, PHB42N03LT
MIN. -
TYP. MAX. UNIT 60 50 1.75 K/W K/W K/W
SOT78 package, in free air SOT404 package, pcb mounted, minimum footprint
-
ELECTRICAL CHARACTERISTICS
Tj= 25°C unless otherwise specified SYMBOL PARAMETER V(BR)DSS VGS(TO) RDS(ON) gfs IDSS IGSS Qg(tot) Qgs Qgd td on tr td off tf Ld Ld Ls Ciss Coss Crss Drain-source breakdown voltage Gate threshold voltage Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55°C VDS = VGS; ID = 1 mA Tj = 175°C Tj = -55°C VGS = 10 V; ID = 25 A VGS = 5 V; ID = 25 A VGS = 5 V; ID = 25 A; Tj = 175°C Forward transconductance VDS = 25 V; ID = 25 A Zero gate voltage drain VDS = 30 V; VGS = 0 V; current Tj = 175°C Gate source leakage current VGS = ±5 V; VDS = 0 V Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance ID = 20 A; VDD = 24 V; VGS = 10 V MIN. 30 27 1 0.5 8 TYP. MAX. UNIT 1.5 16 20 27 0.05 10 40 7 10 12 80 35 31 3.5 4.5 7.5 1050 270 140 2 2.3 23 26 48 10 500 100 20 130 60 45 V V V V V m m m S µA µA nA nC nC nC ns ns ns ns nH nH nH pF pF pF
VDD = 15 V; ID = 25 A; VGS = 5 V; RG = 5 Resistive load Measured tab to centre of die Measured from drain lead to centre of die (SOT78 package only) Measured from source lead to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz
November 1998
2
Rev 1.400
Philips Semiconductors
Product specification
TrenchMOSTM transistor Logic level FET
PHP42N03LT, PHB42N03LT
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25°C unless otherwise specified SYMBOL PARAMETER IS ISM VSD trr Qrr Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 25 A; VGS = 0 V IF = 40 A; VGS = 0 V IF = 40 A; -dIF/dt = 100 A/µs; VGS = -10 V; VR = 25 V TYP. MAX. UNIT 0.95 1.0 52 0.08 45 180 1.2 A A V ns µC
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
Normalised Power Derating
1000
ID, Drain current (Amps)
PHP42N03LT
100
RD
S
) (ON
=V
DS
/ID
tp = 10us 100 us 1 ms DC 10 ms 100 ms
10
0
20
40
60
80 100 Tmb / C
120
140
160
180
1
Tmb = 25 C 1 10 VDS, Drain-source voltage (Volts) 100
Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 °C = f(Tmb)
Normalised Current Derating
Fig.3. Safe operating area ID & IDM = f(VDS); IDM single pulse; parameter tp
Zth j-mb / (K/W) D=
120 110 100 90 80 70 60 50 40 30 20 10 0
ID%
10
7528-30
1 0.5 0.2 0.1 0.1 0.05 0.02 0
0 20 40 60 80 100 Tmb / C 120 140 160 180
P D
tp
D=
tp T t
0.01 1E-07
T
1E-05
1E-03 t/s
1E-01
1E+01
Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 °C = f(Tmb); conditions: VGS 5 V
Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T
November 1998
3
Rev 1.400
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