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Details, datasheet, quote on part number:PM5315
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| Part: | PM5315 |
| Category: | Communication => Network => SONET/SDH/ATM/DS3/PHYs/E3 (T3/E3) => SONET/SDH Interface |
| Description: | Sonet/sdh Payload Extractor/aligner For 2488 Mbit/s |
| Company: | PMC-Sierra |
| Datasheet: | Download PM5315 datasheet File size : 59 kB |
| Request For quote: | Find where to buy PM5315
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Datasheet text preview:
PMC-Sierra,Inc.
Preliminary
PM5315 SPECTR A-248 8
SONET/SDH Payload Extractor/Aligner for 2488 Mbit/s
FEATURES
· Monolithic SONET/SDH Payload Extractor/Aligner for use in interface applications, operating at serial interface speeds of up to 2488 Mbit/s: · single STS-48c (STM-16/AU4-16c); · single STS-48 (STM-16/AU44c/AU4/AU3/TU3); · quad STS-12c (STM-4/AU4-4c); · quad STS-12 (STM4/AU4/AU3/TU3). · In single STS-48/STM-16 mode, supports a duplex 16-bit 155.52 MHz differential PECL line side interface for direct connection to external clock recovery, clock synthesis and serializer-deserializer components. · In quad STS-12/STM-4 mode, supports four duplex 8-bit 77.76 MHz TTL compatible line side interfaces for direct connection to external clock recovery, clock synthesis and serializer-deserializer components. · Provides termination for SONET Section, Line and Path overhead or SDH Regenerator Section, Multiplexer Section and High Order Path overhead. · In single STS-48/STM-16 mode provides a 32-bit 77.76 MHz ADD and DROP TelecomBus. · In quad STS-12/STM-4 mode provides four 8-bit 77.76 MHz ADD and DROP TelecomBus Interfaces. · Maps SONET/SDH payloads to system timing, accommodating plesiochronous timing offsets between the line and system timing references, through pointer processing. · The entire SONET/SDH transport and path overheads are extracted to and inserted from dedicated pins. · Frames to the SONET/SDH receive stream and inserts framing bytes and STS identification into the transmit stream and processes or inserts the transport overhead. · Interprets or generates the STS (AU) pointer bytes (H1, H2, H3), extracts or inserts the synchronous payload envelope(s) and processes or inserts the path overhead. · Provides Time Slot Interchange (TSI) function at the ADD and DROP TelecomBus Interfaces for grooming any legal mix of SONET/SDH paths. · Supports Automatic Protection Switching (APS): · Ring control port communication of path REI and path RDI alarms; · Filters the APS channel (K1,K2) bytes into internal registers; inserts the APS channel into the transmit stream. · Supports line loopback from the line side receive stream to the transmit stream and diagnostic loopback from an ADD TelecomBus interface to a DROP TelecomBus interface. · Provides a standard five signal IEEE 1149.1 JTAG test port for boundary scan board test purposes.
BLOCK DIAGRAM
Status Information
R e c e i v e O/H Clock, F r a m e Pulse R e c e i v e Transport Overhead R e c e i v e Section/Line D C C and Clock
R e c e i v e Path Overhead Bit-interleaved P a r i t y Error
R x Ring Control Port
R x APS Sync Extractor & B i t Error Monitor
Section Trace Processor
Path Trace Processor
( S T S - 1 2 ) Receive Path Processing Slice
O C - 4 8 Mode: 1 6 - b i t x 155.52 M b i t / s PECL 4 x OC-12 Mode: 4 x 8-bit x 77.76 M b i t / s TTL
R x Line Interface
R X Transport O / H Processor
R x Path O/H Processor
Rx Telecom Aligner
D r o p Bus PRBS Generator/ Monitor
R x Timeslot Interchange
Rx TelecomBus System Interface
O C - 4 8 Mode: 3 2 - b i t x 77.76 Mbit/s TelecomBus 4 x OC-12 Mode: 4 x 8-bit x 77.76 M b i t / s TelecomBus Alarm Reporting
SONET/SDH Alarm Reporting Controller Path Trace Processor ( S T S - 1 2 ) Transmit Path Processing Slice
Section Trace Processor O C - 4 8 Mode: 1 6 - b i t x 155.52 M b i t / s PECL 4 x OC-12 Mode: 4 x 8-bit x 77.76 M b i t / s TTL
T x Line Interface
T x Transport O / H Processor
T x Path O/H Processor
Tx Telecom Aligner
A d d Bus T x Pointer PRBS Interpreter Generator/ (STS/AUMonitor TU3)
Tx TelecomBus System Interface
T x Timeslot Interchange
O C - 4 8 Mode: 3 2 - b i t x 77.76 Mbit/s TelecomBus 4 x OC-12 Mode: 4 x 8-bit x 77.76 M b i t / s TelecomBus
T x Ring C o n t r o l Port
J T A G Test A c c e s s Port
Mode
M i c r o p r o c e s s o r Interface
T r a n s m i t O/H Control C l o c k , Frame and Pulse Status Transmit Information Section/Line D C C Clock
Transmit Transport O/H
T r a n s m i t Path O/H
T e s t Data
Q u a d 622 o r 2488
16-bit Microprocessor Bus
PMC-2000326 (p1)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
© Copyright PMC-Sierra, Inc. 2000
Preliminary PM5315 SPECTRA-2488
SONET/SDH Payload Extractor/Aligner for 2488 Mbit/s
· Provides a generic 16-bit microprocessor bus interface for configuration, control, and status monitoring. · Low power 1.8 V CMOS core logic with 3.3 V CMOS/TTL compatible digital inputs and digital outputs. PECL inputs and outputs are 3.3 V compatible. · Industrial temperature range (-40°C to +85°C). · 520 pin Super BGA package.
APPLICATIONS
· Channelized STS-48/STM-16 or 4 x STS-12/STM-4 Interfaces for: · Optical Cross Connects; · Digital Cross Connects; · Router and Switch Line Cards; · ADM Aggregate Cards for TDM and Multiservice applications; · Terminal Multiplexers.
TYPICAL APPLICATIONS
STS-48/STM-16 APPLICATION WITH VT/TU POINTER PROCESSING/ALIGNMENT
ACK A D [ 3 1 : 0 ] , ADP[4:1]
PM5315 SPECTRA2488
AJ0J1[4:1] APL[4:1]
D D 1 [ 7 : 0 ] , DDP[1] DJ0J1[1] DPL[1] DCK D D 2 [ 7 : 0 ] , DDP[2] DJ0J1[2] DPL[2] DCK D D 3 [ 7 : 0 ] , DDP[3] DJ0J1[3] DPL[3] DCK D D 4 [ 7 : 0 ] , DDP[4] DJ0J1[4] DPL[4] DCK
PM5363 TUPP+622
2 4 8 8 Mbit/s Optical Interface
Optical Transceiver
Clock/Data Recovery Clock Synthesis
Serial/ Parallel Converter
16-bit x 155.52 Mbit/s
PM5363 TUPP+622
T o VT/TU CrossC o n n e c t or T r i b u t a r y Cards
PM5363 TUPP+622
PM5363 TUPP+622
Drop Add
STS-48/STM-16 APPLICATION WITH POS/ATM PROCESSING
ACK A D [ 3 1 : 0 ] , ADP[4:1] AJ0J1[4:1] APL[4:1]
2 4 8 8 Mbit/s Optical Interface
Optical Transceiver
Clock/Data Recovery Clock Synthesis
Serial/ Parallel Converter
16-bit x 155.52 Mbit/s
PM5315 SPECTRA-2488
PM7390 S/UNI-MACH48
POS-PHY L e v e l 3/ UTOPIA Level 3
D D [ 3 1 : 0 ] , DDP[4:1] DJ0J1[4:1] DPL[4:1] DCK DFP
To a DatalinkLayer Device
Head Office: PMC-Sierra, Inc. #105 - 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200
To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator
All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com
PMC-2000326 (p1) © Copyright PMC-Sierra, Inc. 2000. All rights reserved. March 2000
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
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