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Part: BD4846
Category:
Power Management
-> Supervisory Circuits
-> Voltage Detectors
Description:
Company: ROHM Electronics
Datasheet: Download BD4846 datasheet File size : 188 kB
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Voltage detectors
BD48XXG/FVE BD49XXG/FVE
CMOS RESET IC
BD48XXG/FVE BD49XXG/FVE
Rohm's BD48XXG/FVE and BD49XXG/FVE are series of high-accuracy, low-power VOLTAGE DETECTOR ICs with a CMOS process. For flexible choice according to the application, BD48XXG/FVE series with N channel open drain output and BD49XXG/FVE series with CMOS output are available in 38 voltage types from 2.3 V to 6.0 V in steps of 0.1 V in different packages, totaling 152 models.
Applications Every kind of appliances with microcontroller and logic circuit
Features 1) Detection voltage: 0.1V step line-up 2.3~6.0V (Typ.) 2) High-accuracy detection voltage: ±1.5% guaranteed (Ability ±1%) 3) Ultra low current consumption: 0.8µA typ. (Output is High.) 4) Nch open drain output (BD48XXG/FVE series), CMOS output (BD49XXG/FVE series) 5) Small package VSOF5(EMP5) : BD48XXFVE/BD49XXFVE SSOP5(SMP5C2) : BD48XXG/BD49XXG Selection guide For BD4XXXX series, detection voltage, output circuit types (Refer to the block diagram at P3), and package (Refer to the dimension at P14) can be selected for your own application. Par t number of devices for each specification is shown below.
Par t No. : B D 4 X X X X
1 Par t No. 1 2 3 Specification Output circuit types Detection voltage Package 2 3 Contents 8 : Open drain output 9 : CMOS output Ex. : VS : described in each 0.1V step for 2.3V~6.0V range (29 means 2.9V) G : SSOP5 (SMP5C2) FVE : VSOF5 (EMP5)
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Voltage detectors
Line-up
Detection Nch Open drain output voltage ( BD48XXG/FVE ) VS
6.0V 5.9V 5.8V 5.7V 5.6V 5.5V 5.4V 5.3V 5.2V 5.1V 5.0V 4.9V 4.8V 4.7V 4.6V 4.5V 4.4V 4.3V 4.2V 4.1V 4.0V 3.9V 3.8V 3.7V 3.6V 3.5V 3.4V 3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V 2.4V 2.3V BD4860G/FVE BD4859G/FVE BD4858G/FVE BD4857G/FVE BD4856G/FVE BD4855G/FVE BD4854G/FVE BD4853G/FVE BD4852G/FVE BD4851G/FVE BD4850G/FVE BD4849G/FVE BD4848G/FVE BD4847G/FVE BD4846G/FVE BD4845G/FVE BD4844G/FVE BD4843G/FVE BD4842G/FVE BD4841G/FVE BD4840G/FVE BD4839G/FVE BD4838G/FVE BD4837G/FVE BD4836G/FVE BD4835G/FVE BD4834G/FVE BD4833G/FVE BD4832G/FVE BD4831G/FVE BD4830G/FVE BD4829G/FVE BD4828G/FVE BD4827G/FVE BD4826G/FVE BD4825G/FVE BD4824G/FVE BD4823G/FVE
BD48XXG/FVE BD49XXG/FVE
CMOS output ( BD49XXG/FVE )
BD4960G/FVE BD4959G/FVE BD4958G/FVE BD4957G/FVE BD4956G/FVE BD4955G/FVE BD4954G/FVE BD4953G/FVE BD4952G/FVE BD4951G/FVE BD4950G/FVE BD4949G/FVE BD4948G/FVE BD4947G/FVE BD4946G/FVE BD4945G/FVE BD4944G/FVE BD4943G/FVE BD4942G/FVE BD4941G/FVE BD4940G/FVE BD4939G/FVE BD4938G/FVE BD4937G/FVE BD4936G/FVE BD4935G/FVE BD4934G/FVE BD4933G/FVE BD4932G/FVE BD4931G/FVE BD4930G/FVE BD4929G/FVE BD4928G/FVE BD4927G/FVE BD4926G/FVE BD4925G/FVE BD4924G/FVE BD4923G/FVE
Detection voltage VS ( V ) Ta=25°C Min.
5.910 5.812 5.713 5.615 5.516 5.418 5.319 5.221 5.122 5.024 4.925 4.827 4.728 4.630 4.531 4.433 4.334 4.236 4.137 4.039 3.940 3.842 3.743 3.645 3.546 3.448 3.349 3.251 3.152 3.054 2.955 2.857 2.758 2.660 2.561 2.463 2.364 2.266
Typ.
6.000 5.900 5.800 5.700 5.600 5.500 5.400 5.300 5.200 5.100 5.000 4.900 4.800 4.700 4.600 4.500 4.400 4.300 4.200 4.100 4.000 3.900 3.800 3.700 3.600 3.500 3.400 3.300 3.200 3.100 3.000 2.900 2.800 2.700 2.600 2.500 2.400 2.300
Max.
6.090 5.989 5.887 5.786 5.684 5.583 5.481 5.380 5.278 5.177 5.075 4.974 4.872 4.771 4.669 4.568 4.466 4.365 4.263 4.162 4.060 3.959 3.857 3.756 3.654 3.553 3.451 3.350 3.248 3.147 3.045 2.944 2.842 2.741 2.639 2.538 2.436 2.335
Hysteresis voltage ( V,Typ. )
Package
SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5)
VS X 0.05
Pin layout Pin layout of VSOF5(EMP5) and SSOP5(SMP5C2) is different as shown below. (Fig.1, Fig.2) When used as replacement, please consider the difference. (The detail of packages is shown at P14.)
BD48XXG/BD49XXG BD48XXFVE/BD49XXFVE
VOUT 1 SUB 2 N.C. 3
1.2mm VSOF5 Package
(EMP5)
VOUT 1 VD D 2
(SMP5C2)
5 N.C.
SSOP5 Package 2.9mm
5
VD D
1.6mm
4
GND
GND 3
1.6mm
4 N.C.
Fig.1
Fig.2 (Note) Connect SUB pin with GND pin.
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Voltage detectors
BD48XXG/FVE BD49XXG/FVE
Block diagram Two output types can be used. One is BD48XXG/FVE (Fig.3) of open drain output type, and the other is BD49XXG/FVE (Fig.4) of CMOS output type.
BD48XXG/FVE : Open drain output
VDD
BD49XXG/FVE : CMOS output
VDD
VOUT Vref Vref GND
VOUT
GND
Fig.3
Fig.4
Absolute maximum rating (Ta=25°C) To prevent the functional deterioration or thermal damage of semiconductor devices and ensure their service life and reliability, they must be designed and reviewed in such a way that the absolute maximum rating can not be exceeded in any cases or even at any moment.
Parameter Power supply voltage Output Nch Open drain output voltage CMOS output Power dissipation SSOP5 (SMP5C2) *1 *3 Power dissipation VSOF5 (EMP5) *2 *3 Operating temperature Storage temperature
*1 Derating : 1.5mW/°C for operation above Ta=25°C *2 Derating : 1.0mW/°C for operation above Ta=25°C *3 When only IC is used.
Symbol VDD GND VOUT Pd Pd Topr Tstg
Limits 0.3 ~ + 10 GND 0.3 ~ + 10 GND 0.3 ~ VDD + 0.3 1 50 1 00 40 ~ + 85 55 ~ + 125
U nit V V
mW mW °C °C
· Power supply voltage This voltage is the applied voltage between VDD and GND. The applied voltage should not exceed the indicated value. · Output voltage VOUT pin voltage should not exceed the indicated value. For Nch open drain output type, VDD applied voltage and VOUT pin H output voltage can be used independently. Both of them should not exceed the each indicated value. · Operating temperature range The circuit function is guaranteed within the temperature range. However, the operating characteristics are different from that of Ta=25°C. If they are any questions about the extent of guarantee of circuit functions in this operating temperature range, please ask for more technical information. · Storage temperature range This IC can be stored up to this temperature range without deterioration of characteristics. However, an abrupt thermal shock of extreme temperature fluctuations may cause the deterioration of characteristics.
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Voltage detectors
Power dissipation
BD48XXG/FVE BD49XXG/FVE
Power consumption of the IC Circuit current at ON/OFF is very small. Power consumption in output depends on each load connected with VOUT pin. Please note that total power consumption must be within a power dissipation range in the secure area of the entire operating temperature. Power dissipation of these packages; SSOP5 (SMP5C2) package (BD48XXG/BD49XXG) Fig.5, and VSOF5 (EMP5) package (BD48XXFVE/BD49XXFVE) Fig.6 is shown below.
SSOP5 (SMP5C2) package
BD48XXG BD49XXG
2 00 Power dissipation (mW) Power dissipation (mW) 200
EMP5 (VSOF5) package
BD48XXFVE BD49XXFVE
1 50
150
1 00
100
50
50
0
25
50
75
1 00
1 25
0
25
50
75
100
125
Ambient temperature Ta(°C)
Ambient temperature Ta(°C)
Fig.5 Thermal derating curve
Fig.6 Thermal derating curve
When it is used in the ambient temperature of (Ta)=25°C and more, make reference to each thermal derating characteristics of used package. Both Fig.5 and Fig.6 show these characteristic when only IC is used. Electrical characteristics (Unless otherwise noted; Ta=-25°C ~ 85°C)
Parameter Detection voltage temperature coefficient Hysteresis voltage "H" transfer delay time Circuit current when ON Symbol VS/T VS TPLH ICC1 Min. -- -- -- -- -- -- -- -- -- -- 0.95 0.4 2.0 0.7 0.9 1.1 -- Tap. ±100 -- 0.51 0.56 0.60 0.66 0.75 0.80 0.85 0.90 -- 1 4 1.4 1.8 2.2 -- Max. ±360 100 1.53 1.68 1.80 1.98 2.25 2.40 2.55 2.70 -- -- -- -- -- -- 0.1 U nit ppm/°C V µs µA RL=470k, VDD=L H L CL=100pF, RL=100k *2 VOUT=GND 50% *1 VS=2.3~3.1V VS=3.2~4.2V VDD=Vs0.2V VS=4.3~5.2V *1 VS=5.3~6.0V VS=2.3~3.1V VS=3.2~4.2V VDD=Vs+2V VS=4.3~5.2V *1 VS=5.3~6.0V RL=470k, VOL0.4V *1 VDS=0.5V, VDD=1.2V VDS=0.5V, VDD=2.4V (VS2.7V) VDS=0.5V, VDD=4.8V VS=2.3~4.2V VDS=0.5V, VDD=6.0V VS=4.3~5.2V VDS=0.5V, VDD=8.0V VS=5.3~6.0V VDD=VDS=10V *1 Conditions Reference Fig.33 Fig.31 Fig.12,13 15,17
VS X 0.03 VS X 0.05 VS X 0.08
Fig.28
Circuit current when OFF Min. operating voltage "L" output current "H" output current Output leak current
ICC2 VOPL IOL IOH Ileak
µA V mA mA µA
Fig.31 Fig.29 Fig.30 Fig.32
*1 Operation is guaranteed forTa=25°C. *2 TPLH : VDD=(VS typ.0.5V) (VS typ.+0.5V). Note) RL is not necessary for CMOS output type. Note) Minimum operating voltage VOUT output becomes inconsistent if the VDD is equal to or lower than the operating limit voltage. It goes open, H, or L. Note) Hysteresis voltage=(Reset release voltage)-(Reset detection voltage) [V]
Term explanation
· Detection voltage (VS) : VDD voltage when the output (Vout) goes from "H" to "L". · Release voltage (VS+VS) : VDD voltage when output (Vout) goes from "L" to "H". · Hysteresis voltage : The difference between detection voltage and release voltage. Malfunction due to noise in VDD (within hysteresis voltage) could be avoided by hysteresis voltage.
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Voltage detectors
Operating explanation
BD48XXG/FVE BD49XXG/FVE
Ex.) For both open drain type (Fig.7) and CMOS output type (Fig.8), detection voltage and release voltage are threshold voltage. When voltage applied to VDD pin reaches each threshold voltage, VOUT pin voltage goes "H" "L" or "L" "H". BD48XXG/FVE series are open drain types and pull-up resistor must be connected to VDD, or other power supply. (In this case, output (VOUT) H voltage is VDD, or other power supply voltage.)
VD D R1 Vref VOUT RL Vref R1 VD D
Q2 VOUT
R2 R3 Q1
R2 R3 Q1 GND
GND
Fig.7 (BD48XX type Internal block diagram)
Fig.8 (BD49XX Internal block diagram)
· SWEEP DOWN for VDD When VDD is equal to or more than the release voltage (Vs+Vs), output VOUT is in "H" mode. (Nch output transistor Q1 is OFF, Pch output transistor Q2 is ON.) When VDD is gradually decreased, output (VOUT) turns "L" in the detection voltage (Vs). (Nch output transistor Q1 is ON, Pch output transistor Q2 is OFF.) · SWEEP UP for VDD When VDD is equal to or lower than the detection voltage (Vs+Vs), output VOUT is in "L" mode. (Nch output transistor Q1 is ON, Pch output transistor Q2 is OFF.) When VDD is gradually increased, output (VOUT) turns "H" in the release voltage (Vs). (Nch output transistor Q1 is OFF, Pch output transistor Q2 is ON.) · Some hysteresis is given such a way that the release voltage is the detection voltage X (1.05 Typ.). · The output becomes inconsistent if the VDD is equal to or lower than the operating limit voltage.
Timing waveform Ex.) The relation between input voltage VDD and output voltage VOUT when VDD is increased and decreased is shown below. (Circuit is shown above. Fig7, 8)
VD D
VDD VS+VS VS
1 If the VDD is equal to or lower than the operating limit
2 When the VDD is equal to or lower than the reset release
voltage (VOPL) at power-up, the output is inconsistent. voltage (Vs+Vs), VOUT=L.
VOUT
VOPL 0V VOH TPLH TPHL TPLH VOL
turns H with a delay of TPLH. See Fig. 15 and 17 for the reference waveform. 4 If the VDD goes below the detection (Vs) at power-down or instantaneous power failure, VOUT turns L with a delay of TPHL. See Fig.16 and 18 for the reference waveform. The potential difference between the detection voltage and the release voltage is called hysteresis (Vs). The products are designed so as to prevent power supply fluctuation within this hysteresis from causing fluctuation in output in order to avoid malfunction due to noise.
3 When VDD exceeds the Reset Release Voltage, VOUT
1
2
3
Fig.9
4
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