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Part: BD5233G
Category:
Power Management
-> Supervisory Circuits
-> Voltage Detectors
Description:
Company: ROHM Electronics
Datasheet: Download BD5233G datasheet File size : 24 kB
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Voltage detectors
BD52XXG/FVE BD53XXG/FVE
CMOS VOLTAGE DETECTOR IC with Delay Time Circuit
BD52XXG/FVE BD53XXG/FVE
ROHM's BD52XXG/FVE and BD53XXG/FVE are series of high-accuracy, low-power VOLTAGE DETECTOR ICs with a CMOS process. These series can set delay time by external capacitor. For flexible choice according to the application, BD52XXG/FVE series with N channel open drain output and BD53XXG/FVE series with CMOS output are available in 38 voltage types which detection voltage is from 2.3V to 6.0V in steps of 0.1V in different packages, totaling 152 models.
Applications Every kind of appliances with microcontroller and logic circuit
Features 1) Detection voltage: 0.1V step line-up 2.3~6.0V (Typ.) 2) High-accuracy detection voltage: ±1.5% guranteed (Ability ±1%) 3) Ultra low current consumption: 0.85µA typ. (Output is High.) 4) Delay time can be set by external capacitor. 5) Nch open drain output (BD52XXG/FVE series), CMOS output (BD53XXG/FVE series) 6) Small package of VSOF5(EMP5)(BD52XXFVE/BD53XXFVE), and SSOP5(SMP5C2)(BD52XXG/BD53XXG)
Selection guide For BD5XXXX series, detection voltage, output circuit types (Refer to the block diagram at P3),and package (Refer to the block diagram at P14) can be selected for your own application.Part number of devices for each specification is shown below.
Par t No. : B D 5 X X X X
1 Par t No. 1 2 3 Specification Output circuit types Detection voltage Package 2 3 Contents 2 : Open drain output 3 : CMOS output Ex. : VDET : described in each 0.1V step for 2.3V~6.0V range (29 means 2.9V) G : SSOP5 (SMP5C2) FVE : VSOF5 (EMP5)
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Voltage detectors
Line-up
Detection Nch Open drain output voltage ( BD52XXG/FVE ) VD E T
6.0V 5.9V 5.8V 5.7V 5.6V 5.5V 5.4V 5.3V 5.2V 5.1V 5.0V 4.9V 4.8V 4.7V 4.6V 4.5V 4.4V 4.3V 4.2V 4.1V 4.0V 3.9V 3.8V 3.7V 3.6V 3.5V 3.4V 3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V 2.4V 2.3V BD5260G/FVE BD5259G/FVE BD5258G/FVE BD5257G/FVE BD5256G/FVE BD5255G/FVE BD5254G/FVE BD5253G/FVE BD5252G/FVE BD5251G/FVE BD5250G/FVE BD5249G/FVE BD5248G/FVE BD5247G/FVE BD5246G/FVE BD5245G/FVE BD5244G/FVE BD5243G/FVE BD5242G/FVE BD5241G/FVE BD5240G/FVE BD5239G/FVE BD5238G/FVE BD5237G/FVE BD5236G/FVE BD5235G/FVE BD5234G/FVE BD5233G/FVE BD5232G/FVE BD5231G/FVE BD5230G/FVE BD5229G/FVE BD5228G/FVE BD5227G/FVE BD5226G/FVE BD5225G/FVE BD5224G/FVE BD5223G/FVE
BD52XXG/FVE BD53XXG/FVE
CMOS output ( BD53XXG/FVE )
BD5360G/FVE BD5359G/FVE BD5358G/FVE BD5357G/FVE BD5356G/FVE BD5355G/FVE BD5354G/FVE BD5353G/FVE BD5352G/FVE BD5351G/FVE BD5350G/FVE BD5349G/FVE BD5348G/FVE BD5347G/FVE BD5346G/FVE BD5345G/FVE BD5344G/FVE BD5343G/FVE BD5342G/FVE BD5341G/FVE BD5340G/FVE BD5339G/FVE BD5338G/FVE BD5337G/FVE BD5336G/FVE BD5335G/FVE BD5334G/FVE BD5333G/FVE BD5332G/FVE BD5331G/FVE BD5330G/FVE BD5329G/FVE BD5328G/FVE BD5327G/FVE BD5326G/FVE BD5325G/FVE BD5324G/FVE BD5323G/FVE
Detection voltage VDET ( V ) Ta=25°C Min.
5.910 5.812 5.713 5.615 5.516 5.418 5.319 5.221 5.122 5.024 4.925 4.827 4.728 4.630 4.531 4.433 4.334 4.236 4.137 4.039 3.940 3.842 3.743 3.645 3.546 3.448 3.349 3.251 3.152 3.054 2.955 2.857 2.758 2.660 2.561 2.463 2.364 2.266
Typ.
6.000 5.900 5.800 5.700 5.600 5.500 5.400 5.300 5.200 5.100 5.000 4.900 4.800 4.700 4.600 4.500 4.400 4.300 4.200 4.100 4.000 3.900 3.800 3.700 3.600 3.500 3.400 3.300 3.200 3.100 3.000 2.900 2.800 2.700 2.600 2.500 2.400 2.300
Max.
6.090 5.989 5.887 5.786 5.684 5.583 5.481 5.380 5.278 5.177 5.075 4.974 4.872 4.771 4.669 4.568 4.466 4.365 4.263 4.162 4.060 3.959 3.857 3.756 3.654 3.553 3.451 3.350 3.248 3.147 3.045 2.944 2.842 2.741 2.639 2.538 2.436 2.335
Hysteresis voltage ( V,Typ. )
Package
SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5) SSOP5 (SMP5C2) / VSOF5 (EMP5)
VDETX 0.05
Pin layout Pin layout of VSOF5(EMP5) and SSOP5(SMP5C2) is different as shown below. (Fig.1, Fig.2) When used as replacement, please consider the difference. (The detail of packages is shown at P14.)
BD52XXG/BD53XXG BD52XXFVE/BD53XXFVE
VOUT 1 SUB 2 N.C. 3
1.2mm VSOF5 Package
(EMP5)
VOUT 1 VD D 2
(SMP5C2)
5 C.T.
SSOP5 Package 2.9mm
5
VD D
1.6mm
4
GND
GND 3
1.6mm
4 N.C.
Fig.1
Fig.2 (Note) Connect SUB pin with GND pin.
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Voltage detectors
BD52XXG/FVE BD53XXG/FVE
Block diagram Two output types can be used. One is BD52XXG/FVE (Left) of open drain output type, and the other is BD53XXG/FVE (Right) of CMOS output type.
BD52XXG/FVE : Open drain output
VD D VD D VD D
BD53XXG/FVE : CMOS output
VD D
Vout
R eset Vout Reset
Vref
Vref GND CT
GND
CT
Fig.3
Fig.4
Absolute maximum rating (Ta=25°C) To prevent the functional deterioration or thermal damage of semiconductor devices and ensure their service life and reliability, they must be designed and reviewed in such a way that the absolute maximum rating can not be exceeded in any cases or even at any moment.
Parameter Power supply voltage Nch Open drain output Output voltage CMOS output CT pin voltage Power dissipation (SSOP5(SMP5C2)) *1 *3 Power dissipation (VSOF5(EMP5)) *2 *3 Operating temperature Storage temperature Symbol VDD GND VOUT VCT Pd Pd Topr Tstg Limits 0.3 ~ + 10 GND 0.3 ~ + 10 GND 0.3 ~ VDD + 0.3 GND 0.3 ~ VDD + 0.3 540 210 40 ~ + 85 55 ~ + 125 Unit V V V mW mW °C °C
*1 Derating : 5.4mW/°C for operation above Ta=25°C *2 Derating : 2.1mW/°C for operation above Ta=25°C *3 When ROHM's standard board(70mmX70mmX1.6mm, glass epoxy board) is mounted.
· Power supply voltage This voltage is the applied voltage between VDD and GND. The applied voltage should not exceed the indicated value. · Output voltage VOUT pin voltage should not exceed the indicated value. For Nch open drain output type, VDD applied voltage and VOUT pin H output voltage can be used independently. Both of them should not exceed the each indicated value. · Operating temperature range The circuit function is guaranteed within the temperature range. However, the operating characteristics are different from that of Ta=25°C. If they are any questions about the extent of guarantee of circuit functions in this operating temperature range, please ask for more technical information. · Storage temperature range This IC can be stored up to this temperature range without deterioration of characteristics. However, an abrupt thermal shock of extreme temperature fluctuations may cause the deterioration of characteristics.
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Voltage detectors
Power dissipation
BD52XXG/FVE BD53XXG/FVE
Power consumption of the IC Circuit current at ON/OFF is very small. Power consumption in output depends on each load connected with VOUT pin. Please note that total power consumption must be within a power dissipation range in the secure area of the entire operating temperature. Power dissipation of these packages; SSOP5 (SMP5C2) package (BD52XXG/ BD53XXG) Fig.5, and VSOF5 (EMP5) package (BD52XXFVE/BD53XXFVE) Fig.6 is shown below.
SSOP5 (SMP5C2) package
BD52XXG BD53XXG
800 800
VSOF5 (EMP5) package
BD52XXFVE BD53XXFVE
Power dissipation (mW)
600 540 400
Power dissipation (mW)
25 50 75 100 125
600
400
200
210 200
0
0
25
50
75
100
125
Ambient temperature Ta(°C)
Ambient temperature Ta(°C)
Fig.5 Thermal derating curve
Fig.6 Thermal derating curve
When it is used in the ambient temperature of (Ta)=25°C and more, make reference to each thermal derating characteristics of used package. Both Fig.5 and Fig.6 show these characteristic when ROHM's standard board (70mmX70mmX1.6mm, glass epoxy board) is mounted. Electrical characteristics (Unless otherwise noted; Ta=-25°C ~ 85°C)
Parameter Detection voltage temperature coefficient Hysteresis voltage Circuit current when ON Symbol VDET/T VDET IDD1 Min. -- Typ. ±100 Max. ±360 Unit ppm/°C V µA RL=470k, VDD=L VDD=VDET0.2V H L VDET=2.3~3.1V VDET=3.2~4.2V VDET=4.3~5.2V VDET=5.3~6.0V VDET=2.3~3.1V VDET=3.2~4.2V VDET=4.3~5.2V VDET=5.3~6.0V Conditions Reference Data Fig.29 Fig.27
Circuit current when OFF Min. operating voltage "L" output current "H" output current
(Only BD53XXG/FVE series)
IDD2 VOPL IOL1 IOL2 IOH
CT pin Threshold voltage CT pin CT pin "L" current Output leak current
VCTH RCT ICT1 ICT2 Ileak
VDETX0.03 VDETX0.05 VDETX0.08 -- 0.80 2.40 -- 0.85 2.55 -- 0.90 2.70 -- 0.95 2.85 -- 0.75 2.25 -- 0.80 2.40 -- 0.85 2.55 -- 0.90 2.70 -- -- 0.95 -- 0.4 1.2 -- 2.0 5.0 0.7 1.4 -- 0.9 1.8 -- -- 1.1 2.2 VDDX0.3 VDDX0.4 VDDX0.6 VDDX0.3 VDDX0.45 VDDX0.6 VDDX0.35 VDDX0.5 VDDX0.6 VDDX0.4 VDDX0.5 VDDX0.6 5.5 9 12.5 -- 15 40 150 240 -- -- -- 0.1
Fig.24
µA
V mA mA
VDD=VDET+2.0V RL=470k, VOL0.4V VDS=0.5V, VDD=1.2V VDS=0.5V, VDD=2.4V VDS=0.5V, VDD=4.8V VDS=0.5V, VDD=6.0V VDS=0.5V, VDD=8.0V
V M µA µA
VDET=2.3~6.0V VDET=2.7~6.0V VDET=2.3~4.2V VDET=4.3~5.2V VDET=5.3~6.0V VDET=2.3~2.6V VDD=VDETX1.1 VDET=2.7~4.2V RL=470k VDET=4.3~5.2V VDET=5.3~6.0V VDD=VDETX1.1, VCT=0.5V *1 VCT=0.1V,VDD=0.95V *1 VCT=0.5V,VDD=1.5V VDD=VDS=10V *1
Fig.33 Fig.25 Fig.26
Fig.34 Fig.35 Fig.36 Fig.31
*1 Operation is guaranteed for Ta=25°C. Note) RL is not necessary for CMOS output type. Note) Minimum operating voltage VOUT output becomes inconsistent if the VDD is equal to or lower than the operating limit voltage. It goes open, H, or L. Note) Hysteresis voltage=(Reset release voltage)-(Reset detection voltage) [V]
Term explanation 1 Detection voltage (VDET) : VDD voltage when the output (Vout) goes from "H" to "L" . 2 Release voltage (VDET+VDET) : VDD voltage when output (Vout) goes from "L" to "H" . 3 Hysteresis voltage (VDET) : The difference between detection voltage and release voltage. Malfunction due to noise in VDD (within hysteresis voltage) could be avoided by hysteresis voltage. 4/15
Voltage detectors
Operating explanation
BD52XXG/FVE BD53XXG/FVE
Ex.) For both open drain type (Fig.7) and CMOS output type (Fig.8), detection voltage and release voltage are threshold voltage. When voltage applied to VDD pin reaches each threshold voltage, VOUT pin voltage goes "H" "L" or "L" "H'. BD52XXG/FVE and BD53XXG/FVE incorporate delay time circuit that can set delay time by the external capacitor when output goes"L" "H". BD52XXG/FVE series are open drain types and pull-up resistor must be connected to VDD, or other power supply. (In this case, output (VOUT) H voltage is VDD, or other power supply voltage.)
VDD VDD R1 Vref Vout Q1 R3 GND CT Q3 R3 GND CT Q3 Q1 R eset R2 Vref VD D R1 VD D Q2 Vout Reset
R2
GND
Fig.7 (BD52XX type Internal block diagram)
Fig.8 (BD53XX Internal block diagram)
· SWEEP DOWN for VDD ·When VDD is equal to or more than the release voltage (VDET+VDET), CT pin voltage becomes VDD (External capacitor is in charging mode.) and output VOUT is in "H" mode. (Nch output transistor Q1 is OFF, Pch output transistor Q2 is ON.) When VDD is gradually decreased, Q3 connected to CT pin in the detection voltage (VDET) switches OFF to ON, external capacitor is discharged, and CT pin voltage becomes decreased. When the CT pin voltage is lower than the threshold voltage of next inverter, output (VOUT) turns "L". (Nch output transistor Q1 is ON, Pch output transistor Q2 is OFF.) · SWEEP UP for VDD · When VDD is equal to or lower than the detection voltage (VDET), CT pin voltage is L voltage (External capacitor is in discharging mode and Q3 is ON), output VOUT is in "L" mode. When VDD is gradually increased, Q3 is OFF in the release voltage (VDET+VDET) and CT pin external capacitor becomes to be charged through resistor R1 in the IC. When the CT pin voltage is more than the threshold voltage of next inverter, output (VOUT) goes from "L" to "H". (Nch output transistor Q1 is OFF, Pch output transistor Q2 is ON.) Delay time is the time when output VOUT goes from "L" to "H" after the VDD is more than the release voltage. (VDET+VDET) Delay time can be set freely by the CT pin external capacitor. (Usage is shown at P10) ·Some hysteresis is given such a way that the release voltage is the detection voltageX(1.05 Typ.). · The output becomes inconsistent if the VDD is equal to or lower than the operating limit voltage. Timing waveform Ex.) The relation between input voltage VDD and output voltage VOUT when VDD is increased and decreased is shown below. (Circuit is shown in Fig7, Fig.8)
VDD VDET+VDET VDET
1 If the VDD is equal to or lower than the operating limit
VIN
2 When the VDD is equal to or more than the VOPL and the
voltage (VOPL) at power-up, the output is inconsistent.
VOPL 0V VDD
VCT
1/2 VDD
VDD is equal to or more than the reset release voltage (VDET+VDET), CT pin voltage (VCT) is "L" and output (VOUT) is also "L".
VDD
VOUT
TPLH TPHL
TPLH
1
2
3
4
Fig.9
(VDET+VDET), VOUT goes from "L" to "H" with a delay of TPLH set by the capacitor that is connected to CT pin. 4 If the VDD goes below the detection voltage (VDET) at power-down or instantaneous power failure, VOUT turns L with a delay of TPHL. See Fig.16 for the reference waveform. The potential difference between the detection voltage and the release voltage is called hysteresis (VDET). The products are designed so as to prevent power supply fluctuation within this hysteresis from causing fluctuation in output in order to avoid malfunction due to noise. 5/15
3 When the VDD is equal to or more than reset release voltage
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