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Part: al0402i

Category:
 ASICs
             -> Mixed Signal Cores->0.5um

Description: Description = AL0402I 16Bit 44.1KHz Sigma-delta Audio DAC ;; Function = Codec ;; Configuration = 16BIT 44kHz ;; Library Type = STD85 ;; Characteristic = 5V/45mA

Company: Samsung Semiconductor, Inc.

Datasheet: Download al0402i datasheet     File size : 1040 kB

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Datasheet text preview:
16Bit 44.1kHz Sigma-Delta Stereo DAC

16Bit 44.1kHz Sigma-Delta Stereo DAC
Features

AL0402I

AL0402I

General Description
This product is Digital-To-Analog Converter for digital audio System (CDP). The product contains Serial-to-Parallel Converter and Compensation Filter, Digital Volume Attenuator by the MICOM Interface, De-Emphasis Filter, FIR filter, Sinc Filter, digital sigma-delta modulator, analog postfilter, AIF (Anti-Image-Filter). The normal input and output channels provides 95dB SNR (Signal to Noise Ratio) over in band (20kHz). The product employs the 1bit 4th-order sigma-delta architecture with 16bit resolution, over sampling of 64X. And analog postfilter with low clock sensitivity and linear phase, filters the shaping-nosie and outputs analog voltage with high resolution. An on-chip reference voltage is included to allow single supply operations.

-16bit Digital-To-Analog Converter -On-Chip Analog Postfilter -Filtered Line-Level Outputs, Linear Phase Filtering -On-Chip Voltage Reference -95dB SNR -Sampling Rate 32KHz/44.1kHz/48KHz -Input Rate 1Fs or 2Fs by Normal Mode/Double Mode Selection -Zero Input Detection Mute -On-Chip Compensation Filter -Input Volume Attenuator by the MICOM Interface -On-Chip De-Emphasis Filter (32KHz/44.1KHz/48KHz) -On-Chip 4 times oversampling Digital Filter -Low Clock Jitter Sensitivity -Single 5V Power Supply

Applications
CD Player, Portable CD Player, CD-ROM, Video-CD, Mini-Disk, DVD etc

Block Diagram

VDDD VSSD

VBB

VDDA VSSA

SDATA BCK LRCK ZDENL

S/P Converter & Attenuator

Compensation Filter & De-emphsis & FIR Filter

Sinc Filter & Sigma-Delta Modulator

DAC & Analog Postfilter

AOUTL Anti-Imaging Filter AOUTR

MICOM Interface

Timing Generation

Voltage Reference

VREF IREF

M C L K

MM F I DLSD ADE N T LU A M 1 :7 0: 0

TPMBR SDU I S EL TST ETB L LO N P

MDD SNE C E K M

S E R R O R B

S D I A G

O F S 6 4

O D S L

O D S R

I F S 6 4

I A D S L

I A D S R

Ver 1.0

(Nov 1999) This datasheet is a preliminary version. No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties that may result from its use. The content of this datasheet is subject to change without any notice.

SEC ASIC



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16Bit 44.1kHz Sigma-Delta Stereo DAC Embedded Core Block Diagram

AL0402I

External Inputs 4 M U X MSCK BCK LRCK SDATA ZDENL DEEM DN MUTEL PDL RSTB MCLK MLD MDATA FSEL IDNUM 5 BISTONP TSEL IFS64 IADSL IADSR V S S D V D D D VVV BDS BDS AA AOUTL AOUTR VREF

External

4

4

MUX_S EL

Audio Processor (DSP)

6

al0402i
IREF SDIAG S ERRORB OFS64 ODSL ODSR

13

VSSD

Thes e are test pins for internal block s of the core. So you don't need the internal tes t mode. Make the test control pins disable ('L') state and Output and bidirectional pins leave foalting.

Embedded Core User Guide
- Digital serial data input and clock input refer to digital input format.

- Digital control pins inform refer to pin description. - Micom I/F pin inform refer to micom interface. IDNUM are ID number setting pins for micom Interface. - External application of analog output pins refer to application circuit. - If you want to test only embedded analog core block (Sigma-Delta DAC), you can do it just adding the 4 pins to supply digital serial input data (LRCK, BCK, SDATA, MSCK) and MUX block. - Analog power(VDDA,VSSA,VBB) and digital power(VDDD, VSSD) should be seperated. - VBB pin should be connected to analog ground. - Two pads should be dedicated to analog power(VDDA, VSSA) - If you need not use test mode for the testability of internal core block, you make internal core block test pins disable state. (Test Input pins are 'L' state and Test output, bidirection pins leave floating)

SEC ASIC

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16Bit 44.1kHz Sigma-Delta Stereo DAC Core Pin Description
SYMBOL Power Supply Pins VDDD VSSD VDDA VSSA Digital Pins MSCK BCK LRCK SDATA MCLK MLD MDATA DEEM DN MUTEL ZDENL DI DI DI DI DI DI DI DI DI DI DI piccbb_bb piccbb_bb piccbb_bb piccbb_bb piccbb_bb piccbb_bb piccbb_bb piccbb_bb piccbb_bb piccbb_bb piccbb_bb Master Clock Input. 384Fs Clock Bit Clock Input. (32Fs or 64Fs) Sample Rate Clock Input. (Fs or 2Fs) Serial Digital Input Micom Interface Clock Input DP DG AP AG vdd3t_bb vsst_bb vdd3t_bb vsst_bb Digital Supply Digital Ground Analog Supply Analog Ground I/O TYPE I/O PAD DESCRIPTION

AL0402I

I /O T Y P E A B B R .
AI : Analog Input DI : Digital Input AO : Analog Output DO : Digital Output AB : Analog Bidirectional DB : Digital Bidirectional AP : Analog Power AG : Analog Ground DP : Digital Power DG : Digital Ground

Micom Interface Command load Input (When low,load) Micom Interface Command Data Input De-Emphasis On/Off. "H" is enabled. "L" is disabled. Input Rate Select. High is Double(2Fs) Mode, Low is Normal(Fs) Mode. Analog Output Mute. "L" enabled Zero Input Detection Enable. "L" is enabled. "H" is disabled De-Emphasis Sampling Frequency Mode Select FSEL HH HL LH LL Sa mp l in g Fre q u e nc y 4 8KHz 3 2 KH z 4 8 KH z 44 .1 KHz

FSEL

DI

piccbb_bb

IDNUM PDL RSTB Analog Pins AOUTL AOUTR VREF Core Internal Block Test Pins BISTONP TSEL IFS64 IADSL IADSR SDIAG SERRORB OFS64 ODSL ODSR IREF

DI DI DI

piccbb_bb piccbb_bb piccbb_bb

Micom Interface ID Number setting Input Power Down. "L" enabled Reset Input. "L" Enabled

AO AO AO

poabb_bb poabb_bb poabb_bb

Analog Output for L-CH Analog Output for R-CH Reference Voltage Output for Bypass

DI DI DI DI DI DO DO DO DO DO AB

piccbb_bb piccbb_bb piccbb_bb piccbb_bb piccbb_bb pot2bb_bb pot2bb_bb pot2bb_bb pot2bb_bb pot2bb_bb poabb_bb

Memory Bist Test Mode. "H" enabled Test pin for Analog Postfilter Input Selection 64X Sampling Clock Input for Analog Postfilter (When TSEL=H) Inputs for Analog Postfilter of L-CH (When TSEL=H) Inputs for Analog Postfilter of R-CH (When TSEL=H) Test Output pin for embeded memory BIST (BIST_ON="H") Test Output Pin for Embeded memory BIST (BIST_ON="H") 64X Sampling Clock output for Digital sigma-delta Modulator L-CH Output for Digital sigma-delta Modulator. R-CH Output for Digital sigma-delta Modulator. Test Pin for Analog Supply Current

SEC ASIC

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16Bit 44.1kHz Sigma-Delta Stereo DAC

AL0402I

MSCK BCK LRCK SDATA ZDENL MCLK MLD MDATA FSEL IDNUM DEEM DN MUTEL PDL RSTB BISTONP TSEL IFS64 IADSL IADSR

AOUTL AOUTR VREF

al0402i
Used Power: (VDDD VSSD VBB VDDA VSSA)

IREF SDIAG SERRORB OFS64 ODSL ODSR

Core Configurtion Absolute Maximum Ratings
Characteristics Supply Voltage Voltage on Any Digital Pin Storage Temperature Range Symbol VDDD,VDDA Vin Tstg Values -0.3 ~ 7.0 VSSD-0.3 to VDDD+0.3 -45 to +125 Unit V V °C

Recommended Operating Conditions
Charateristics Supply Voltage Operating Temp. SYMBOL VDDD VDDA T opr M IN 4 .7 5 0 TY P 5 .0 25 MAX 5 .2 5 70 UNITS V °C

Electrical Characteristics
(VDDD,VDDA=5.0V, Temp=25°C, Fs=44.1kHz, Signal Frequency=20~20kHz, Cload of AoutL, AoutR=10pF) PARAMETER Resolution SNR THD


MIN

TYP 16

MAX

UNITS bits dB

90

95 0.004 0.007



% dB dB V

SND(THD+Noise) Dynamic Range



82 85

87 90 2 .2 5



Reference Voltage Ouput Frequency Responce Analog Output Voltage Range

±0 .1

±0.5

dB

±1.414

Vpp

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16Bit 44.1kHz Sigma-Delta Stereo DAC
Load Impedance Digital Filter Pass Band Ripple Stop Band Attenuation Pass Band Power Supply Analog Current Digital Current Power Dissipation Power Down Current 1kHz 0dB Sinewave Input, EIAJ 1kHz 0dB Sinewave Input 1kHz 0dB Sinewave Input, (Not EIAJ) 1kHz -60dB Sinewve Input, and then measured data + 60dB 25 20 225 1 mA mA mW mA 5K

AL0402I


±0.0072
6 2 .7 0 .4 5

dB dB Fs

AC Timing Characteristics
Characteristics MSCK Frequency BCK Frequency (Normal/Doube Mode) MSCK Rising and LRCK Edge Dealay MSCK Risng and LRCK Edge Setup Time BCK Rising and LRCK Edge Dealay BCK Risng and LRCK Edge Setup Time SDATA and BCK Rising Setup Time BCK Ring and SDATA Hold Time

(VDDD=5V, VSSD=0V, VBB = 0V, Temp=25°C, Sampling Frequency = 44.1kHz) Symbol Fmck Fbck Tmld Tmlst Tbld Tblst Tsbst Tbsht 0 10 0 10 10 10 Min Typ 16.9344 1.4112 / 2.8224 (Normal / Double) Max Unit MHz MHz ns ns ns ns ns ns

SEC ASIC

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