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Details, datasheet, quote on part number:dac0415x
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| Part: | dac0415x |
| Category: | ASICs => Mixed Signal Cores->0.18um |
| Description: | Description = DAC0415X 0.18µm 16/20/24-BIT 44.1/32/48kHZ Sigma-delta Stereo DAC ;; Function = DAC ;; Configuration = 16/20/24-BITS Sigma-delta ;; Library Type = - ;; Characteristic = - |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download dac0415x datasheet File size : 97 kB |
| Request For quote: | Find where to buy dac0415x
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Datasheet text preview:
DAC0415X
0.18µm 16/20/24-BIT 44.1/32/48kHZ SIGMA-DELTA STEREO DAC µ
GENERAL DESCRIPTION
This product is Sigma-Delta Digital-To-Analog Converter for High grade Digital Audio Applications. The product contains Serial-to-Parallel Interface Converter and Compensation Filter, Digital Volume Attenuator by the Mode Interface, De-Emphasis Filter, FIR filter, Sinc Filter, Digital Sigma-Delta Modulator, Analog Postfilter, AIF (AntiImage-Filter). The normal input and output channels provides 95dB SNR (Signal to Noise Ratio) over in band (20kHz : Sampling Rate = 44.1KHz). The product employs the 1bit 4th-order Sigma-Delta architecture with 16bit resolution, over sampling of 64X. And Analog Postfilter with low clock sensitivity and Linear phase, filters the Shaping-Nosie and outputs Analog voltage with high resolution. An on-chip reference voltage is included to allow single supply operations.
FEATURES
-- 16/20/24bit Sigma-Delta Digital-to-Analog Converter -- Sampling Frequency Rate 32/44.1/48kHz -- Input Rate 1Fs or 2Fs by Normal Mode/Double -- Mode Selection -- On-Chip Compensation Filter -- On-Chip 4 times Oversampling Digital Filter -- On-Chip Analog Postfilter -- Filtered Line-Level Outputs, Linear Phase Filtering -- On-Chip Voltage Reference -- Low Clock Jitter Sensitivity -- 96dB SNR -- L/R Independent Digital Soft Attenuation -- On-Chip De-Emphasis Filter (32/44.1/48kHz) -- Zero Input Detection Mute -- Soft Mute Control -- Mono/Stereo Setting -- Single 1.8V / 3.3V(Digital/Analog) Power Supply
APPLICATIONS
-- CD Player, CD-ROM, MP3 Player, Video-CD, Mini-Disk, DVD etc.
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0.18µm 16/20/24-BIT 44.1/32/48kHZ SIGMA-DELTA STEREO DAC µ
DAC0415X
BLOCK DIAGRAM
AVDD18D Compensation Filter & De-emphsis & FIR Filter
AVSS18D
AVDD33A
AVSS33A
MSCK BCK LRCK SDATA ZDENH
S/P Converter & Attenuator
Sinc Filter & Sigma-Delta Modulator
DAC & Analog Postfilter
AntiImaging Filter
AOUTL AOUTR VCOMML(I)* VCOMCL(I)* VCOML(I)* VREFML(I)* VREFPL(I)* VHALF(O)* VREFIN(I)* VREF(O)* VREFPR(I)* VREFMR(I)* VCOMR(I)* VCOMCR(I)* VCOMMR(I)*
Mode Interface & Timing Control
Test Mode Interface
Voltage Reference
MODE MCKDEM MDAFS1 MLDFS0 DN IIS IFS MUTEL ZDENL RSTB PDL IDNUM
BISTONP SDIAG SERRORB TSEL OFS64 ODSL ODSR IFS64 IADSL IADSR IFEF(B)*
(I)* : Input (O)* : Output (B)* : Bidirection
Ver 4.1 (Feb. 2002) This data sheet is a preliminary version. No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties that may result from its use. The content of this data sheet is subject to change without any notice.
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DAC0415X
0.18µm 16/20/24-BIT 44.1/32/48kHZ SIGMA-DELTA STEREO DAC µ
EMBEDDED CORE BLOCK DIAGRAM
External Inputs 4 M U X MSCK BCK LRCK SDATA MODE MCKDEM MDAFS1 MLDFS0 DN IIS IFS MUTEL ZDENL RSTB PDL IDNUM ZDENH BISTONP TSEL IFS64 IADSL IADSR AOUTL AOUTR VHALF VREF VREFIN This pin must be connected to VHALF PAD VCOML VCOMCL VCOMML Each ports must be VREFPL connected to VREF VCOMR PAD VCOMCR VCOMMR VREFPR Each ports must be VREFML connected to VREFMR AVSS33A PAD IREF SDIAG SERRORB OFS64 ODSL ODSR External
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4
MUX_SEL
Audio Processor (DSP) 15
dac0415x
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AVSS18D
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These are test pins for internal blocks of the core. So you don't need the internal test mode. Make the test control pins disable ('L') state and Output and bidirectional pins leave floating.
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0.18µm 16/20/24-BIT 44.1/32/48kHZ SIGMA-DELTA STEREO DAC µ
DAC0415X
EMBEDDED CORE USER GUIDE
-- Digital serial data input and clock input refer to digital input format. -- Digital control pins inform refer to pin description. -- Mode I/F pin inform refer to Mode Interface. IDNUM are ID number setting pins for Mode Interface. -- External application of analog output pins refer to application circuit. -- If you want to test only embedded analog core block (Sigma-Delta DAC), you can do it just adding the 4 pins to supply digital serial input data (MSCK, BCK, LRCK, SDATA) and MUX block. -- Analog power(AVDD33A,AVSS33A) and digital power(AVDD18D,AVSS18D) should be separated. -- Bulk Power pin should be connected to analog ground(AVSS33A). -- Two pads should be dedicated to analog power(AVDD33A, AVSS33A) -- If you need not use test mode for the testability of internal core block, you make internal core block test pins disable state. (Test Input pins are 'L' state and Test output, bi-direction pins leave floating)
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DAC0415X
0.18µm 16/20/24-BIT 44.1/32/48kHZ SIGMA-DELTA STEREO DAC µ
CORE PIN DESCRIPTION
Pin Name AVDD18D AVSS18D AVDD33A AVSS33A Digital Pins MSCK BCK LRCK SDATA ZDENH DI DI DI DI DO picc_abb picc_abb picc_abb picc_abb pob2_abb Master Clock Input. Bit Clock Input. Sample Rate Clock Input. (Fs or 2Fs) Serial Digital Input Zero Data Detection Output When Input Data is continuously zero for more than 4096*sampling time(fs), ZDENH becomes to H. SoftWare / HardWare Control Select ("H" / "L") Mode Interface Clock Input / De-Emphasis On/Off. "H" is enabled. "L" is disabled. (When MODE pin is "H", MCLK is active. When MODE pin is "L", DEEM is active) Mode Interface Command Data Input / De-Emphasis Frequency Selection1 (When MODE pin is "H", MDATA is active. When MODE pin is "L", SFS1 is active) Mode Interface Command load Input(when low,load) / De-Emphasis Frequency Selection0 (When MODE pin is "H", MLD is active. When MODE pin is "L", SFS0 is active) Input Rate Select. High is Double(2Fs) Mode, Low is Normal(Fs) Mode. (When MODE pin is "L" (Hardware mode), this pin is active) IIS / Standard Input Format Selection (When MODE pin is "L" (Hardware mode), this pin is active) Input Format Selection (When MODE pin is "L" (Hardware mode), this pin is active) Analog Output Mute. "L" enabled (When MODE pin is "L" (Hardware mode), this pin is active) Zero Input Detection Enable. "L" is enabled. "H" is disabled (When MODE pin is "L" (Hardware mode), this pin is active) Reset Input. "L" Enabled Power Down. "L" enabled Mode Interface ID Number Setting Input I/O Type DP DG AP AG I / O Pad vdd1t_abb vss1t_abb vdd3t_abb vss3t_abb Digital Supply Digital Ground Analog Supply Analog Ground Pin Description
Power Supply Pins
MODE MCKDEM (MCLK/DEEM)
DI DI
picc_abb picc_abb
MDAFS1 (MDATA/SFS1)
DI
picc_abb
MLDFS0 (MLD/SFS0)
DI
picc_abb
DN
DI
picc_abb
IIS IFS MUTEL ZDENL RSTB PDL IDNUM
DI DI DI DI DI DI DI
picc_abb picc_abb picc_abb picc_abb picc_abb picc_abb picc_abb
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