|
|
Part: K4G323222M-QC/L7C
Category:
Memory
-> DRAM
-> SGRAM
-> 32 Mb->Graphics Memory
Description: Description = K4G323222M 512K X 32Bit X 2 Banks Synchronous Graphic RAM ;; Organization = 1Mx32 ;; Voltage(V) = 3.3 ;; Speed(ns) = 45,50,55,7C,60,70,80 ;; Package = 100PQFP,100TQFP ;; Production Status = Eol ;; Comments = LVTTL
Company: Samsung Semiconductor, Inc.
Datasheet: Download K4G323222M-QC/L7C datasheet File size : 283 kB
Request For quote: Find where to buy K4G323222M-QC/L7C
Datasheet text preview:
K4G323222M
CMOS SGRAM
32Mbit SGRAM
512K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL
Revision 1.1 February 2000
Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.1 (Feb. 2000)
K4G323222M
Revision History
Revision 1.1 (February,3 2000)
· Add K4G323222M-7C (133MHz@CL2,tRCD/tRP=2tCK).
CMOS SGRAM
Revision 1.0 (October 1999)
· Initial Release
Rev. 1.1 (Feb. 2000)
K4G323222M
512K x 32Bit x 2 Banks Synchronous Graphic RAM
FEATURES
· · · · 3.3V power supply LVTTL compatible with multiplexed address Dual bank operation MRS cycle with address key programs -. CAS Latency (2, 3) -. Burst Length (1, 2, 4, 8 & full page) -. Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst Read Single-bit Write operation DQM 0-3 for byte masking Auto & self refresh 32ms refresh period (2K cycle) 100 Pin PQFP, TQFP (14 x 20 mm)
CMOS SGRAM
GENERAL DESCRIPTION
The K4G323222M is 33,554,432 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 32 bits, fabricated with SAMSUNGs high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length, and programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications. Write per bit and 8 columns block write improves performance in graphics systems.
· · · · · ·
ORDERING INFORMATION
Part NO. K4G323222M-PC/L45 K4G323222M-PC/L50 K4G323222M-PC/L55 K4G323222M-PC/L7C K4G323222M-PC/L60 K4G323222M-PC/L70 K4G323222M-PC/L80 K4G323222M-QC/L45 K4G323222M-QC/L50 K4G323222M-QC/L55 K4G323222M-QC/L7C K4G323222M-QC/L60 K4G323222M-QC/L70 K4G323222M-QC/L80 Max Freq. Interface Package 222MHz 200MHz 183MHz 133MHz@CL2 LVTTL 100 PQFP 166MHz 143MHz 125MHz 222MHz 200MHz 183MHz 133MHz@CL2 LVTTL 100 TQFP 166MHz 143MHz 125MHz
INPUT BUFFER
Graphics Features
· SMRS cycle. -. Load mask register -. Load color register · Write Per Bit(Old Mask) · Block Write(8 Columns)
FUNCTIONAL BLOCK DIAGRAM
DQMi BLOCK WRITE CONTROL LOGIC CLK CKE CS
MASK REGISTER
MASK
WRITE
CONTROL
LOGIC
MUX
COLOR REGISTER
·
COLUMN MASK DQMi DQi (i=0~31)
TIMING REGISTER
SENSE AMPLIFIER
RAS CAS WE DSF DQMi
·
512Kx32 CELL ARRAY
512Kx32 CELL ARRAY
ROW DECORDER BANK SELECTION
·
SERIAL COUNTER COLUMN ADDRESS BUFFER ROW ADDRESS BUFFER REFRESH COUNTER
ADDRESS REGISTER CLOCK ADDRESS(A0~A10,BA)
* Samsung Electronics reserves the right to
change products or specification without notice.
OUTPUT BUFFER
LATENCY & BURST LENGTH
PROGRAMING REGISTER
COLUMN DECORDER
Rev. 1.1 (Feb. 2000)
Others parts begin by k4
K4-1 K4-2 K4-3 K4-4 K4-5 K4-6 K4-7 K4-8 K4-9
|
|
|
