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Part: K6R4004V1B-15
Category:
Memory
-> SRAM
-> Async. SRAM
-> 4 Mb
-> -> Fast SRAM
Description: Description = K6R4004C1B 1M X 4 Bit (With OE) High-speed CMOS Static RAM ;; Organization = 1Mx4 ;; Vcc(V) = 3.3 ;; Speed-tAA(ns) = 10,12,15 ;; Operating Temperature = C,i ;; Operating Current(mA) = 185 ;; Standby Current(mA) = 10 ;; Package = 32SOJ,32TSOP2 ;; Production Status = Eol ;; Comments = -
Company: Samsung Semiconductor, Inc.
Datasheet: Download K6R4004V1B-15 datasheet File size : 158 kB
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Datasheet text preview:
K6R4004V1B-C/B-L, K6R4004V1B-I/B-P
Document Title
1Mx4 Bit (with OE) High Speed Static RAM(3.3V Operating), Operated at Commercial and Industrial Temperature Ranges.
PRELIMINARY CMOS SRAM
Revision History
Rev No. Rev. 0.0 Rev. 1.0 History Initial release with Design Target. Release to Preliminary Data Sheet. 1.1. Replace Design Target to Preliminary. Release to Final Data Sheet. 2.1. Delete Preliminary. 2.2. Add 30pF capacitive in test load. 2.3. Relax DC characteristics. Item Previous ICC 10ns 160mA 12ns 150mA 15ns 140mA ISB f=max. 40mA ISB1 f=0 10 / 1mA IDR VDR=3.0V 0.9mA Draft Data Jan. 1st, 1997 Jun. 1st, 1997 Remark Design Target Preliminary
Rev. 2.0
Feb.11th.1998
Final
Current 185mA 180mA 175mA 50mA 10 / 1.5mA 0.7mA Jun. 27th 1998 Final
Rev. 2.1
Change operating current at Industrial Temperature range. Previous spec. Changed spec. Items (10/12/15ns part) (10/12/15ns part) ICC 185/180/175mA 210/205/200mA
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 2.1 June 1998
K6R4004V1B-C/B-L, K6R4004V1B-I/B-P
FEATURES
· Fast Access Time 10,12,15ns(Max.) · Low Power Dissipation Standby (TTL) : 50mA(Max.) (CMOS) : 10mA(Max.) 1.5mA(Max.)- L-Ver. Operating K6R4004V1B-10 : 185mA(Max.) K6R4004V1B-12 : 180mA(Max.) K6R4004V1B-15 : 175mA(Max.) · Single 3.3±0.3V Power Supply · TTL Compatible Inputs and Outputs · Fully Static Operation - No Clock or Refresh required · Three State Outputs · 2V Minimum Data Retention ; L-Ver. only · Center Power/Ground Pin Configuration · Standard Pin Configuration K6R4004V1B-J : 32-SOJ-400 K6R4004V1B-T : 32-TSOP2-400CF
PRELIMINARY CMOS SRAM
1M x 4 Bit (with OE)High-Speed CMOS Static RAM(3.3V Operating)
GENERAL DESCRIPTION
The K6R4004V1B is a 4,194,304-bit high-speed Static Random Access Memory organized as 1,048,576 words by 4 bits. The K6R4004V1B uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNGs advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R4004V1B is packaged in a 400 mil 32-pin plastic SOJ or TSOP(II) forward.
PIN CONFIGURATION(Top View)
ORDERING INFORMATION
K6R4004V1B-C10/C12/C15 K6R4004V1B-I10/I12/I15 Commercial Temp. Industrial Temp.
A0 A1 A2 A3 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27
A19 A18 A17 A16 A15 OE
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A0 A1 A3 A4 A5 A6 A7 A8 A2
CS I/O1 Vcc
26 I/O4
Pre-Charge Circuit
Vss I/O2 WE
SOJ/ TSOP2
25 24
Vss Vcc
23 I/O3 22 21 20 19 18 17 A14 A13 A12 A11 A10 N.C
Row Select
A5
Memory Array 512 Rows 2048x4 Columns
A6 A7 A8 A9
I/O1 ~I/O4
Data Cont.
I/O Circuit & Column Select
PIN FUNCTION
Pin Name Pin Function Address Inputs Write Enable Chip Select Output Enable Data Inputs/Outputs Power(+3.3V) Ground No Connection A0 - A19 WE
CLK Gen.
A 10 A9 CS WE OE A12 A14 A16 A18 A11 A13 A15 A17 A19
CS OE I/O1 ~ I/O4 VCC V SS N.C
-2-
Rev 2.1 June 1998
K6R4004V1B-C/B-L, K6R4004V1B-I/B-P
ABSOLUTE MAXIMUM RATINGS*
Parameter Voltage on Any Pin Relative to VSS Voltage on VCC Supply Relative to VSS Power Dissipation Storage Temperature Operating Temperature Commercial Industrial Symbol VIN, VOUT VCC PD TSTG TA TA Rating -0.5 to 4.6 -0.5 to 4.6 1.0 -65 to 150 0 to 70 -40 to 85
PRELIMINARY CMOS SRAM
Unit V V W °C °C °C
* Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS*(TA=0 to 70°C)
Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL Min 3.0 0 2.0 -0.3** Typ 3.3 0 Max 3.6 0 VCC+0.3*** 0.8 Unit V V V V
* The above parameters are also guaranteed at industrial temperature range. ** VIL(Min) = -2.0V a.c(Pulse Width 8ns) for I 20mA. *** VIH(Max) = VCC + 2.0V a.c (Pulse Width 8ns) for I 20mA.
DC AND OPERATING CHARACTERISTICS*(TA=0 to 70°C, Vcc=3.3±0.3V, unless otherwise specified)
Parameter Input Leakage Current Output Leakage Current Operating Current Symbol ILI I LO ICC VIN=VSS to VCC CS=VIH or OE=VIH or WE=VIL VOUT=VSS to VCC Min. Cycle, 100% Duty CS=VIL, VIN=VIH or VIL, IOUT=0mA 10ns 12ns 15ns Standby Current I SB ISB1 Min. Cycle, CS=VIH f=0MHz, CS VCC-0.2V, VIN VCC-0.2V or VIN 0.2V IOL=8mA IOH=-4mA Normal L-Ver. Test Conditions Min -2 -2 2.4 Max 2 2 185 180 175 50 10 1.5 0.4 V V mA mA Unit µA µA mA
Output Low Voltage Level Output High Voltage Level
VOL VOH
* The above parameters are also guaranteed at industrial temperature range.
CAPACITANCE* (TA=25°C, f=1.0MHz)
Item Input/Output Capacitance Input Capacitance
* Capacitance is sampled and not 100% tested.
Symbol C I/O CIN
Test Conditions VI/O=0V VIN=0V
MIN -
Max 8 7
Unit pF pF
-3-
Rev 2.1 June 1998
Others parts begin by k6
K6-1 K6-2 K6-3 K6-4 K6-5 K6-6 K6-7 K6-8 K6-9 K6-10 K6-11
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