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Details, datasheet, quote on part number:KM23V4000D-10
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| Part: | KM23V4000D-10 |
| Category: | Memory => ROM => Mask ROM => Standard => 4M bit |
| Description: | Description = KM23V4000D 4M-Bit (512K X 8) CMOS Mask ROM ;; Organization = 512Kx8 ;; Voltage(V) = 3.3 ;; Speed(ns) = 120,100 ;; Package = 32TSOP1 ;; Current (mA/uA) = 20,25/30 ;; Production Status = Mass Production ;; Comments = - |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KM23V4000D-10 datasheet File size : 72 kB |
| Request For quote: | Find where to buy KM23V4000D-10
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Datasheet text preview:
KM23V4000D(E)TY/KM23S4000D(E)TY
4M-Bit (512Kx8) CMOS MASK ROM
FEATURES
· 524,288 x 8 bit organization · Fast access time 3.3V Operation : 100ns(Max.) 3.0V Operation : 120ns(Max.) 2.5V Operation : 250ns(Max.) · Supply voltage KM23V4000D(E)TY : single +3.0V/ single +3.3V KM23S4000D(E)TY : single +2.5V · Current consumption Operating : 25mA(Max.) Standby : 30µA(Max.) · Fully static operation · All inputs and outputs TTL compatible · Three state outputs · Package -. KM23V(S)4000D(E)TY : 32-TSOP1-0820
CMOS MASK ROM
GENERAL DESCRIPTION
The KM23V4000D(E)TY and KM23S4000D(E)TY are fully static mask programmable ROM organized 524,288 x 8 bit. It is fabricated using silicon gate CMOS process technoiogy. This device operates with low power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The KM23V4000D(E)TY and KM23S4000D(E)TY are packaged in a 32-TSOP1.
FUNCTIONAL BLOCK DIAGRAM
A18 X BUFFERS AND DECODER MEMORY CELL MATRIX (524,288x8)
PRODUCT INFORMATION
Product Operating Temp Range 0°C~70°C -20°C~85°C Vcc Range (Typical) 3.3V/3.0V 2.5V 3.3V/3.0V 2.5V Speed (ns) 100/120 250 100/120 250
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A0
KM23V4000DTY KM23S4000DTY KM23V4000DETY KM23S4000DETY
Y BUFFERS AND DECODER
SENSE AMP. BUFFERS
PIN CONFIGURATION
...
A 11 A9 A8 A1 3 A1 4 A1 7 N.C VC C A1 8 A1 6 #1 #32 OE A10 CE Q7 Q6 Q5 Q4
CE OE
CONTROL LOGIC
Q0
Q7
32-TSOP1
Q3 VSS Q2 Q1 Q0 A0 A1 A2
Pin Name A0 - A18 Q0 - Q7 CE OE VCC V SS N.C
Pin Function Address Inputs Data Outputs Chip Enable Output Enable Power Ground No Connection
A1 5 A1 2 A7 A6 A5 A4 #16 #17
A3
KM23V4000D(E)TY KM23S4000D(E)TY
KM23V4000D(E)TY/KM23S4000D(E)TY
ABSOLUTE MAXIMUM RATINGS
Item Voltage on Any Pin Relative to VSS Temperature Under Bias Storage Temperature Symbol VIN TBIAS TSTG Rating -0.3 to +4.5 -10 to +85 -55 to +150 0 to +70 Operating Temperature TA -20 to +85
CMOS MASK ROM
Unit V °C °C °C °C Remark KM23V4000DTY KM23S4000DTY KM23V4000DETY KM23S4000DETY
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS(Voltage reference to VSS)
Item Symbol VCC VSS Min 2.7/3.0 2.3 0 Typ 3.0/3.3 2.5 0 Max 3.3/3.6 2.7 0 Unit V V V
Supply Voltage
DC CHARACTERISTICS
Parameter Symbol Test Conditions VCC=3.3±0.3V Operating Current ICC CE=OE =VIL, all outputs open VCC=3.0±0.3V VCC=2.5±0.2V Min 2.0 -0.3 -0.3 IOH=-400 µA IOH=-400 µA IOL=2.1mA 2.4 2.0 Max 25 20 15 500 30 10 10 VCC+0.3 0.6 0.4 0.4 Unit mA mA mA µA µA µA µA V V V V V V
Standby Current(TTL) Standby Current(CMOS) Input Leakage Current Output Leakage Current Input High Voltage, All Inputs Input Low Voltage, All Inputs VIL
I SB1 I SB2 ILI I LO VIH KM23V4000D(E)TY KM23S4000D(E)TY KM23V4000D(E)TY KM23S4000D(E)TY VOL
CE=VIH, all outputs open CE=VCC, all outputs open VIN=0 to VCC VOUT=0 to VCC
Output High Voltage Level Output Low Voltage Level
VOH
NOTE : Minimum DC Voltage(VIL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns. Maximum DC voltage on input pins(VIH) is VCC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.
MODE SELECTION
CE H L OE X H L Mode Standby Operating Operating Data High-Z High-Z Dout Power Standby Active Active
KM23V4000D(E)TY/KM23S4000D(E)TY
CAPACITANCE(TA=25°C, f=1.0MHz)
Item Output Capacitance Input Capacitance Symbol C OUT CIN Test Conditions VOUT=0V VIN=0V MIN -
CMOS MASK ROM
Max 10 10 Unit pF pF
NOTE : Capacitance is periodically sampled and not 100% tested.
AC CHARACTERISTICS(VCC=3.3V/3.0V±0.3V / VCC=2.5V±0.2V, unless otherwise noted.)
TEST CONDITIONS
Item Input Pulse Levels Input Rise and Fall Times Input and Output timing Levels Output Loads Value 0.45V to 2.4V (at VCC=3.3V/3.0V) 0.4V to 2.2V (at VCC=2.5V) 10ns 1.5V (at VCC=3.3V/3.0V) 1.1V (at VCC=2.5V) 1 TTL Gate and CL=100pF
READ CYCLE
Item Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time Output or Chip Disable to Output High-Z Output Hold from Address Change Symbol tRC t ACE t AA tOE t DF t OH 0 VCC=3.3V±0.3V Min 100 100 100 50 20 0 Max VCC=3.0V±0.3V Min 120 120 120 60 20 0 Max VCC=2.5V±0.2V Min 250 250 250 110 50 Max Unit ns ns ns ns ns ns
TIMING DIAGRAM
READ
ADD
ADD1 tRC tACE
ADD2 t DF(Note)
CE t OE OE tOH DOUT VALID DATA VALID DATA tAA
NOTE : tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to VOH or VOL level.
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