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Details, datasheet, quote on part number:KM23V64000B
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| Part: | KM23V64000B |
| Category: | Memory => ROM => Mask ROM => Standard => 64M bit |
| Description: | Description = KM23V64000B 64M-Bit (8Mx8 / 4Mx16) CMOS Mask ROM ;; Organization = 4Mx16 ;; Voltage(V) = 3.0 ;; Speed(ns) = 120 ;; Package = 42DIP ;; Current (mA/uA) = 40 ;; Production Status = Mass Production ;; Comments = - |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KM23V64000B datasheet File size : 82 kB |
| Request For quote: | Find where to buy KM23V64000B
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Datasheet text preview:
KM23V64000BTY
64M-Bit (8Mx8 /4Mx16) CMOS MASK ROM
FEATURES
· Switchable organization 8,388,608 x 8(byte mode) 4,194,304 x 16(word mode) · Fast access time 3.3V Operation : 100ns(Max.) 3.0V Operation : 120ns(Max.) · Supply voltage : single +3.0V/ single +3.3V · Current consumption Operating :40/35mA(Max.) Standby : 50µA(Max.) · Fully static operation · All inputs and outputs TTL compatible · Three state outputs · Package KM23V64000BTY : 48-TSOP1-1218
Advance Information CMOS MASK ROM
GENERAL DESCRIPTION
The KM23V64000BTY is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either as 8,388,608 x 8 bit(byte mode) or as 4,194,304 x 16 bit(word mode) depending on BHE voltage level.(See mode selection table) This device operates with 3.0V or 3.3V power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The KM23V64000BTY is packaged in a 48-TSOP1.
FUNCTIONAL BLOCK DIAGRAM
Pin Name A21 . . . . . . . . A0 A-1 ... CE OE BHE CONTROL LOGIC Q0/Q 8 Q 7 /Q1 5 X BUFFERS AND DECODER MEMORY CELL MATRIX (4,194,304x16/ 8,388,608x8) Q15 /A-1 BHE Y BUFFERS AND DECODER DATA OUT BUFFERS CE SENSE AMP. OE VCC Vss N.C A0 - A21 Q0 - Q14 Pin Function Address Inputs Data Outputs Output 15(Word mode)/ LSB Address(Byte mode) Word/Byte selection Chip Enable Output Enable Power Ground No Connection
KM23V64000BTY
PIN CONFIGURATION
Advance Information CMOS MASK ROM
BHE A16 A 15 A1 4 A 13 A 12 A 11 A 10 A9 A8 A19 A21 A 20 A 18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
TSOP1
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
VSS VS S Q15/A-1 Q7 Q 14 Q6 Q 13 Q5 Q12 Q4 VC C VCC N.C Q 11 Q3 Q 10 Q2 Q9 Q1 Q8 Q0 OE VSS VSS
KM23V64000BTY
ABSOLUTE MAXIMUM RATINGS
Item Voltage on Any Pin Relative to VSS Temperature Under Bias Storage Temperature Symbol VIN TBIAS TSTG Rating -0.3 to +4.5 -10 to +85 -55 to +150 Unit V °C °C
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS(Voltage reference to VSS, TA=0 to 70°C)
Item Supply Voltage Supply Voltage Symbol VCC VSS Min 2.7/3.0 0 Typ 3.0/3.3 0 Max 3.3/3.6 0 Unit V V
DC CHARACTERISTICS
Parameter Operating Current Standby Current(TTL) Standby Current(CMOS) Input Leakage Current Output Leakage Current Input High Voltage, All Inputs Input Low Voltage, All Inputs Output High Voltage Level Output Low Voltage Level Symbol ICC ISB1 ISB2 I LI ILO VIH VIL VOH VOL IOH=-400µA IOL=2.1mA Test Conditions CE=OE=VIL, all outputs open VCC=3.3V±0.3V VCC=3.0V±0.3V Min Max 40 35 500 50 2.0 -0.3 2.4 10 10 VCC+0.3 0.6 0.4 Unit mA mA µA µA µA µA V V V V
CE=VIH, all outputs open CE=VCC, all outputs open VIN=0 to VCC VOUT=0 to VCC
NOTE : Minimum DC Voltage(VIL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns. Maximum DC voltage on input pins(VIH) is VCC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.
KM23V64000BTY
MODE SELECTION
CE H L L OE X H L BHE X X H L Q15/A-1 X X Output Input Mode Standby Operating Operating Operating
Advance Information CMOS MASK ROM
Data High-Z High-Z Q0~Q15 : Dout Q0~Q7 : Dout Q8~Q14 : Hi-Z Power Standby Active Active Active
CAPACITANCE(TA=25°C, f=1.0MHz)
Item Output Capacitance Input Capacitance Symbol COUT CIN Test Conditions VOUT=0V VIN=0V Min Max 12 12 Unit pF pF
NOTE : Capacitance is periodically sampled and not 100% tested.
AC CHARACTERISTICS(TA=0°C to +70°C,VCC=3.3V/3.0V±0.3V, unless otherwise noted.)
TEST CONDITIONS
Item Input Pulse Levels Input Rise and Fall Times Input and Output timing Levels Output Loads Value 0.45V to 2.4V 10ns 1.5V 1 TTL Gate and CL=100pF
READ CYCLE
Item Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time Output or Chip Disable to Output High-Z Output Hold from Address Change Symbol tRC t ACE t AA tOE t DF tOH 0 VCC=3.3V±0.3V Min 100 100 100 50 20 0 Max VCC=3.0V±0.3V Min 120 120 120 60 20 Max ns ns ns ns ns ns Unit
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