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Details, datasheet, quote on part number:KM23V64005BG
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| Part: | KM23V64005BG |
| Category: | Memory => ROM => Mask ROM => Pagemode => 64M bit |
| Description: | Description = KM23V64005B 64M-Bit(8Mx8/4Mx16) CMOS Mask ROM ;; Organization = 8Mx8,4Mx16 ;; Voltage(V) = 3.3 ;; Speed(ns) = 100/30ns(Max.)@CL=50pF,120/40(Max.)@CL=100pF ;; Package = 44SOP,44TSOP2,48TSOP1,48FBGA ;; Current (mA/uA) = 60/50 ;; Production Status = Mass Production ;; Comments = - |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KM23V64005BG datasheet File size : 116 kB |
| Request For quote: | Find where to buy KM23V64005BG
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Datasheet text preview:
KM23V64005BF
64M-Bit (8Mx8 /4Mx16) CMOS MASK ROM
FEATURES
· Switchable organization 8,388,608 x 8(byte mode) 4,194,304 x 16(word mode) · Fast access Time Random Access Time/Page Access Time 3.3V Operation : 100/30ns(max.) 3.0V Operation : 120/40ns(max.) · 8 words / 16bytes page access · Supply voltage VCC : single +3.3V/ single +3.0V VCCQ : equal to VCC · Temperature : 0°C ~ +70°C · Current consumption Operating(ICC) : 60mA (max) Standby(ISB2) : 50uA (max) · Fully static operation · All inputs and outputs TTL compatible · Package KM23V64005BF : 48-CSP with 0.75mm ball pitch
Preliminary Information CMOS MASK ROM
GENERAL DESCRIPTION
The KM23V64005BF is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either as 8,388,608 x 8 bit(byte mode) or as 4,194,304 x 16 bit(word mode) depending on BHE voltage level. This device includes page read mode function, page read mode allows 8 words (or 16 bytes) of data to be read fast in the same page, CE and A3 ~ A21 should not be changed. This device operates with 3.0V or 3.3V power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and operating system and/or application software storage for handheld application. The KM23V64005BF is packaged in a 48-CSP with 0.75mm ball pitch and 6x8 ball array.
FUNCTIONAL BLOCK DIAGRAM
Pin Name A 21 X MEMORY CELL MATRIX (4,194,304x16/ 8,388,608x8) A0 - A2 A3 - A21 Q0 - Q14 Q15 /A-1 BHE Y BUFFERS AND A3 A0~A2 A -1 DECODER DATA OUT BUFFERS CE SENSE AMP. OE VCC VCCQ VSS NC
Pin Function Page Address Inputs Address Inputs Data Outputs Output 15(Word mode)/ LSB Address(Byte mode) Word/Byte selection Chip Enable Output Enable Power Data Output Power ( =VCC) Ground No Connection
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BUFFERS AND DECODER
...
CE OE BHE CONTROL LOGIC Q 0 /Q8 Q7/Q15
KM23V64005BF
48FP-BGA PIN CONFIGURATION (TOP VIEW)
1 2 3 4 5 6
Preliminary Information CMOS MASK ROM
A
A14
A10
N.C
A20
A6
A2
B
A13
A11
A19
N.C
A7
A3
C
A15
A12
A8
A21
A5
A4
D
D15/ A-1 Vss
A9
VCCQ
A18
A17
OE
E
D6
VCC
D2
D9
Vss
F
BHE
D7
D5
D10
D0
CE
G
A16
D14
D12
D11
D8
A0
H
N.C*
D13
D4
D3
D1
A1
Note : See last page for package dimension. N.C* : will be MSB Address for the 128Mbit.
ABSOLUTE MAXIMUM RATINGS
Item Voltage on Any Pin Relative to VSS Temperature Under Bias Storage Temperature Operating Temperature Symbol VIN T BIAS T Stg TA Rating -0.3 to +4.5 -10 to +85 -55 to +150 0 to +70 Unit V °C °C °C
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS(Voltage reference to VSS, TA = 0 to 70°C)
Item Supply Voltage Supply Voltage Symbol VCC/VCCQ VSS Min 2.7/3.0 0 Typ 3.0/3.3 0 Max 3.3/3.6 0 Unit V V
KM23V64005BF
DC CHARACTERISTICS
Parameter Operating Current Standby Current(TTL) Standby Current(CMOS) Input Leakage Current Output Leakage Current Input High Voltage, All Inputs Input Low Voltage, All Inputs Output High Voltage Level Output Low Voltage Level Symbol ICC ISB1 ISB2 ILI ILO VIH V IL VOH VOL IOH=-400µA IOL=2.1mA Test Conditions CE=OE=VIL, all outputs open
Preliminary Information CMOS MASK ROM
Min Max 60 50 500 50 2.0 -0.3 2.4 10 10 VCC+0.3 0.6 0.4 Unit mA mA µA µA µA µA V V V V
VCC=3.3V±0.3V VCC=3.0V±0.3V
CE=VIH, all outputs open CE=VCC, all outputs open VIN=0 to VCC VOUT=0 to VCC
NOTE : Minimum DC Voltage(VIL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns. Maximum DC voltage on input pins(VIH) is VDD+0.3V which, during transitions, may overshoot to VDD+2.0V for periods <20ns.
MODE SELECTION
CE H L L OE X H L BHE X X H L Q15/A-1 X X Output Input Mode Standby Operating Operating Operating Data High-Z High-Z Q0~Q15 : Dout Q0~Q7 : Dout Q8~Q 14 : Hi-Z Power Standby Active Active Active
CAPACITANCE( TA =25°C, f=1.0MHz)
Item Output Capacitance Input Capacitance Symbol C OUT CIN Test Conditions VOUT=0V VIN=0V Min Max 12 12 Unit pF pF
NOTE : Capacitance is periodically sampled and not 100% tested.
AC CHARACTERISTICS(TA=0°C to +70°C, VCC=3.3V/3.0V±0.3V, VCCQ=VCC, unless otherwise noted.)
TEST CONDITIONS
Item Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Loads Value 0.45V to 2.4V 10ns 1.5V 1 TTL Gate and CL=100pF
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