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Details, datasheet, quote on part number:KM416C4000C
 
 
Part:KM416C4000C
Category:Memory => DRAM => EDO/FPM DRAM => 64 Mb => Asynchronous->5V FPM
Description:4m X 16bit CMOS Dynamic RAM With Fast Page Mode
Company:Samsung Semiconductor, Inc.
Datasheet:Download KM416C4000C datasheet   File size : 923 kB
Request For quote:  Find where to buy KM416C4000C
 



Datasheet text preview:
KM416C4000C, KM416C4100C
CMOS DRAM
4M x 16bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 4,194,304 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time ( -5 or -6) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsungs advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
· Part Identification - KM416C4000C(5.0V, 8K Ref.) - KM416C4100C(5.0V, 4K Ref.) · Active Power Dissipation Unit : mW Speed -5 -6 8K 495 440 4K 660 605
· Fast Page Mode operation · 2CAS Byte/Word Read/Write operation · CAS-before-RAS refresh capability · RAS-only and Hidden refresh capability · Fast parallel test mode capability · TTL(5.0V) compatible inputs and outputs · Early Write or output enable controlled write · JEDEC Standard pinout · Available in Plastic TSOP(II) package · +5.0V±10% power supply
· Refresh Cycles Part NO. KM416C4000C* KM416C4100C Refresh cycle 8K 4K Refresh time Normal 64ms
RAS UCAS LCAS W Control Clocks Vcc Vss Lower Data in Buffer Sense Amps & I/O Lower Data out Buffer Upper Data in Buffer Upper Data out Buffer
FUNCTIONAL BLOCK DIAGRAM
VBB Generator
* Access mode & RAS only refresh mode : 8K cycle/64ms CAS-before-RAS & Hidden refresh mode : 4K cycle/64ms
Refresh Timer Refresh Control
Row Decoder
DQ0 to DQ7
· Performance Range Speed -5 -6
Refresh Counter
Memory Array 4,194,304 x 16 Cells
OE DQ8 to DQ15
tR A C
50ns 60ns
tCAC
13ns 15ns
tR C
90ns 110ns
tP C
35ns 40ns
A0~A12 (A0~A11)*1 A0~A8 (A0~A9)*1
Row Address Buffer Col. Address Buffer Column Decoder
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
KM416C4000C, KM416C4100C
CMOS DRAM
PIN CONFIGURATION (Top Views)
· KM416C40(1)00CS
V CC DQ0 DQ1 DQ2 DQ3 V CC DQ4 DQ5 DQ6 DQ7 N.C V CC W RAS N.C N.C N.C N.C A0 A1 A2 A3 A4 A5 V CC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
VSS DQ15 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ9 DQ8 N.C VSS LCAS UCAS OE N.C N.C A12(N.C)* A11 A10 A9 A8 A7 A6 VSS
(400mil TSOP(II)) *(N.C) : N.C for 4K Refresh Product
Pin Name A0 - A12 A0 - A11 DQ0 - 15 VSS RAS UCAS LCAS W OE VCC N.C
Pin function Address Inputs(8K Product) Address Inputs(4K Product) Data In/Out Ground Row Address Strobe Upper Column Address Strobe Lower Column Address Strobe Read/Write Input Data Output Enable Power(+5.0V) No Connection
KM416C4000C, KM416C4100C
ABSOLUTE MAXIMUM RATINGS
Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Output Current Symbol VIN,VOUT V CC Tstg PD IOS Address Rating -1.0 to +7.0 -1.0 to +7.0 -55 to +150 1 50
CMOS DRAM
Units V V °C W mA
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, TA= 0 to 70°C)
Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol V CC V SS VIH VIL Min 4.5 0 2.6 -1.0 *2 Typ 5.0 0 Max 5.5 0 VCC+1.0 0.7
*1
Units V V V V
*1 : VCC+2.0V at pulse width20ns which is measured at VCC *2 : -2.0 at pulse width20ns which is measured at VSS
DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.)
Parameter Input Leakage Current (Any input 0VINVCC+0.5V, all other pins not under test=0 Volt) Output Leakage Current (Data out is disabled, 0VVOUTVCC) Output High Voltage Level(IOH=-5mA) Output Low Voltage Level(IOL=4.2mA) Symbol I I(L) IO(L) VOH VOL Min -5 -5 2.4 Max 5 5 0.4 Units uA uA V V