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Part: KM416C4004C
Category:
Memory
-> DRAM
-> EDO/FPM DRAM
-> Modules
-> 8 MB
-> EDO
Description: 4m X 16bit CMOS Dynamic RAM With Extended Data Out
Company: Samsung Semiconductor, Inc.
Datasheet: Download KM416C4004C datasheet File size : 1012 kB
Request For quote: Find where to buy KM416C4004C
Datasheet text preview:
KM416C4004C, KM416C4104C
CMOS DRAM
4M x 16bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-5 or -6) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 4Mx16 EDO Mode DRAM family is fabricated using Samsungs advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
· Part Identification - KM416C4004C(5.0V, 8K Ref.) - KM416C4104C(5.0V, 4K Ref.)
· Extended Data Out Mode operation · 2 CAS Byte/Word Read/Write operation · CAS-before-RAS refresh capability · RAS-only and Hidden refresh capability · Fast parallel test mode capability · TTL(5.0V) compatible inputs and outputs · Early Write or output enable controlled write Unit : mW · JEDEC Standard pinout · Available in Plastic TSOP(II) package · +5.0V±10% power supply
· Active Power Dissipation Speed -5 -6 8K 495 440 4K 660 605
· Refresh Cycles Part NO. KM416C4004C* KM416C4104C Refresh cycle 8K 4K Refresh time Normal 64ms
RAS UCAS LCAS W Control Clocks VBB Generator Vcc Vss Lower Data in Buffer Sense Amps & I/O Lower Data out Buffer Upper Data in Buffer Upper Data out Buffer
FUNCTIONAL BLOCK DIAGRAM
* Access mode & RAS only refresh mode : 8K cycle/64ms CAS-before-RAS & Hidden refresh mode : 4K cycle/64ms · Performance Range Speed -5 -6
Refresh Timer Refresh Control Refresh Counter
Row Decoder
DQ0 to DQ7
tR A C
50ns 60ns
tCAC
13ns 15ns
tR C
84ns 104ns
tH P C
20ns 25ns
A0~A12 (A0~A11)*1 A0~A8 (A0~A9)*1 Row Address Buffer Col. Address Buffer
Memory Array 4,194,304 x 16 Cells
OE
Column Decoder
DQ8 to DQ15
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
KM416C4004C, KM416C4104C
CMOS DRAM
PIN CONFIGURATION (Top Views)
· KM416C40(1)04CS
V CC DQ0 DQ1 DQ2 DQ3 V CC DQ4 DQ5 DQ6 DQ7 N.C V CC W RAS N.C N.C N.C N.C A0 A1 A2 A3 A4 A5 V CC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
VSS DQ15 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ9 DQ8 N.C VSS LCAS UCAS OE N.C N.C A12(N.C)* A11 A10 A9 A8 A7 A6 VSS
(400mil TSOP(II)) *(N.C) : N.C for 4K Refresh Product
Pin Name A0 - A12 A0 - A11 DQ0 - 15 VSS RAS UCAS LCAS W OE VCC N.C
Pin function Address Inputs(8K Product) Address Inputs(4K Product) Data In/Out Ground Row Address Strobe Upper Column Address Strobe Lower Column Address Strobe Read/Write Input Data Output Enable Power(+5.0V) No Connection
KM416C4004C, KM416C4104C
ABSOLUTE MAXIMUM RATINGS
Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Output Current Symbol VIN,VOUT V CC Tstg PD IOS Address Rating -1.0 to +7.0 -1.0 to +7.0 -55 to +150 1 50
CMOS DRAM
Units V V °C W mA
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, TA= 0 to 70°C)
Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol V CC V SS VIH VIL Min 4.5 0 2.6 -1.0*2 Typ 5.0 0 Max 5.5 0 VCC+1.0*1 0.7 Units V V V V
*1 : VCC+2.0V at pulse width20ns which is measured at VCC *2 : -2.0 at pulse width20ns which is measured at VSS
DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.)
Parameter Input Leakage Current (Any input 0VINVCC+0.5V, all other pins not under test=0 Volt) Output Leakage Current (Data out is disabled, 0VVOUTVCC) Output High Voltage Level(IOH=-5mA) Output Low Voltage Level(IOL=4.2mA) Symbol I I(L) IO(L) VOH V OL Min -5 -5 2.4 Max 5 5 0.4 Units uA uA V V
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