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Details, datasheet, quote on part number:KM416V1200C
 
 
Part:KM416V1200C
Category:Memory => DRAM => EDO/FPM DRAM => 16 Mb => Asynchronous->5V FPM
Description:1m X 16bit CMOS Dynamic RAM With Fast Page Mode
Company:Samsung Semiconductor, Inc.
Datasheet:Download KM416V1200C datasheet   File size : 786 kB
Request For quote:  Find where to buy KM416V1200C
 



Datasheet text preview:
KM416C1000C, KM416C1200C KM416V1000C, KM416V1200C
CMOS DRAM
1M x 16Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 1,048,576 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K Ref.), access time (-5 or -6), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CASbefore-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 1Mx16 Fast Page Mode DRAM family is fabricated using Samsungs advanced CMOS process to realize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
FEATURES
· Part Identification - KM416C1000C/C-L (5V, 4K Ref.) - KM416C1200C/C-L (5V, 1K Ref.) - KM416V1000C/C-L (3.3V, 4K Ref.) - KM416V1200C/C-L (3.3V, 1K Ref.) · Active Power Dissipation Unit : mW Speed -5 -6 3.3V 4K 324 288 1K 504 468 4K 495 440 5V 1K 770 715
· Fast Page Mode operation · 2 CAS Byte/Word Read/Write operation · CAS-before-RAS refresh capability · RAS-only and Hidden refresh capability · Self-refresh capability (L-ver only) · TTL(5V)/LVTTL(3.3V) compatible inputs and outputs · Early Write or output enable controlled write · JEDEC Standard pinout · Available in 42-pin SOJ 400mil and 50(44)-pin TSOP(II) 400mil packages · Single +5V±10% power supply (5V product) · Single +3.3V±0.3V power supply (3.3V product)
· Refresh Cycles Part NO. C1000C V1000C C1200C V1200C VCC 5V 3.3V 5V 3.3V Refresh cycle 4K 1K Refresh period Normal 64ms 128ms 16ms L-ver
RAS UCAS LCAS W
FUNCTIONAL BLOCK DIAGRAM
Control Clocks Vcc Vss Lower Data in Buffer Sense Amps & I/O Lower Data out Buffer Upper Data in Buffer Upper Data out Buffer
VBB Generator
Refresh Timer Refresh Control Refresh Counter
Row Decoder
DQ0 to DQ7
· Perfomance Range Speed -5 -6
Memory Array 1,048,576 x16 Cells
OE DQ8 to DQ15
tRAC
50ns 60ns
tCAC
15ns 15ns
tRC
90ns 110ns
tPC
35ns 40ns
Remark 5V/3.3V 5V/3.3V
A0-A11 (A0 - A9) *1 A0 - A7 (A0 - A9) *1
Row Address Buffer Col. Address Buffer Column Decoder
Note) *1 : 1K Refresh
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
KM416C1000C, KM416C1200C KM416V1000C, KM416V1200C
CMOS DRAM
PIN CONFIGURATION (Top Views)
·KM416C/V10(2)00CJ ·KM416C/V10(2)00CT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
VCC DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 N.C N.C W RAS *A11(N.C) *A10(N.C) A0 A1 A2 A3 VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
VSS DQ15 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ9 DQ8 N.C LCAS UCAS OE A9 A8 A7 A6 A5 A4 VSS
VCC DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 N.C N.C N.C W RAS *A11(N.C) *A10(N.C) A0 A1 A2 A3 VCC
VSS DQ15 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ9 DQ8 N.C N.C LCAS UCAS OE A9 A8 A7 A6 A5 A4 VSS
*A10 and A11 are N.C for KM416C/V1200C(5V/3.3V, 1K Ref. product) J : 400mil 42 SOJ T : 400mil 50(44) TSOP II
Pin Name A0 - A11 A0 - A9 DQ0 - 15 VSS RAS UCAS LCAS W OE VCC N.C
Pin Function Address Inputs (4K Product) Address Inputs (1K Product) Data In/Out Ground Row Address Strobe Upper Column Address Strobe Lower Column Address Strobe Read/Write Input Data Output Enable Power(+5V) Power(+3.3V) No Connection
KM416C1000C, KM416C1200C KM416V1000C, KM416V1200C
ABSOLUTE MAXIMUM RATINGS
Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Output Current Symbol VIN, VOUT VCC Tstg PD IOS Rating 3.3V -0.5 to +4.6 -0.5 to +4.6 -55 to +150 1 50
CMOS DRAM
5V -1.0 to +7.0 -1.0 to +7.0 -55 to +150 1 50
Units V V °C W mA
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, TA= 0 to 70°C)
Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL 3.3V Min 3.0 0 2.0 -0.3*2 Typ 3.3 0 Max 3.6 0 VCC+0.3*1 0.8 Min 4.5 0 2.4 -1.0*2 5V Typ 5.0 0 Max 5.5 0 VCC+1.0*1 0.8 Units V V V V
*1 : VCC+1.3V/15ns(3.3V), VCC+2.0V/20ns(5V), Pulse width is measured at VCC *2 : -1.3V/15ns(3.3V), -2.0V/20ns(5V), Pulse width is measured at VSS
DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.)
Max Parameter Input Leakage Current (Any input 0VINVIN+0.3V, all other input pins not under test=0 Volt) 3.3V Output Leakage Current (Data out is disabled, 0VVOUTVCC) Output High Voltage Level(IOH=-2mA) Output Low Voltage Level(IOL=2mA) Input Leakage Current (Any input 0VINVIN+0.5V, all other input pins not under test=0 Volt) 5V Output Leakage Current (Data out is disabled, 0VVOUTVCC) Output High Voltage Level(IOH=-5mA) Output Low Voltage Level(IOL=4.2mA) Symbol II(L) IO(L) VOH VOL II(L) IO(L) VOH VOL Min -5 -5 2.4 -5 -5 2.4 Max 5 5 0.4 5 5 0.4 Units uA uA V V uA uA V V