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Details, datasheet, quote on part number:KM44C4004CK
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| Part: | KM44C4004CK |
| Category: | Memory => DRAM => Async DRAM => 16 Mb |
| Description: | Description = KM44C4004CK 4M X 4Bit CMOS Dynamic RAM With Extended Data Out ;; Organization = 4Mx4 ;; Mode = Edo ;; Voltage(V) = 5 ;; Refresh = 4K/64ms ;; Speed(ns) = 50,60 ;; Package = 26SOJ,24SOJ,26TSOP2,24TSOP2 ;; Power = Normal,low ;; Production Status = Eol ;; Comments = - |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KM44C4004CK datasheet File size : 394 kB |
| Request For quote: | Find where to buy KM44C4004CK
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Datasheet text preview:
KM44C4004C, KM44C4104C KM44V4004C, KM44V4104C
CMOS DRAM
4M x 4Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 4.194,304 x 4 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-5 or -6), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx4 EDO DRAM family is fabricated using Samsungs advanced CMOS process to realize high band-width, low power consumption and high reliability. It may be used as main memory unit for high level computer, microcomputer and personal computer.
FEATURES
· Part Identification - KM44C4004C/C-L (5V, 4K Ref.) - KM44C4104C/C-L (5V, 2K Ref.) - KM44V4004C/C-L (3.3V, 4K Ref.) - KM44V4104C/C-L (3.3V, 2K Ref.) · Active Power Dissipation Unit : mW Speed -5 -6 3.3V 4K 324 288 2K 396 360 4K 495 440 5V 2K 605 550
· Extended Data Out Mode operation (Fast Page Mode with Extended Data Out) · CAS-before-RAS refresh capability · RAS-only and Hidden refresh capability · Self-refresh capability (L-ver only) · Fast parallel test mode capability · TTL(5V)/LVTTL(3.3V) compatible inputs and outputs · Early Write or output enable controlled write · JEDEC Standard pinout · Available in Plastic SOJ and TSOP(II) packages · Single +5V±10% power supply (5V product) · Single +3.3V±0.3V power supply (3.3V product)
· Refresh Cycles Part NO. C4004C V4004C C4104C V4104C VCC 5V 3.3V 5V 3.3V Refresh cycle 4K 2K Refresh period Normal 64ms 128ms 32ms L-ver
RAS CAS W
FUNCTIONAL BLOCK DIAGRAM
Control Clocks Vcc Vss
VBB Generator
Data in Refresh Timer Refresh Control Refresh Counter Memory Array 4,194,304 x4 Cells Row Decoder Sense Amps & I/O Buffer
DQ0 to DQ3
· Performance Range Speed -5 -6
tRAC
50ns 60ns
tCAC
15ns 17ns
tRC
84ns 104ns
tHPC
20ns 25ns
Remark 5V/3.3V 5V/3.3V
A0-A11 (A0 - A10) *1 A0 - A9 (A0 - A10) *1
Row Address Buffer Col. Address Buffer Column Decoder
Data out Buffer OE
Note) *1 : 2K Refresh
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
KM44C4004C, KM44C4104C KM44V4004C, KM44V4104C
CMOS DRAM
PIN CONFIGURATION (Top Views)
·KM44C/V40(1)04CK
·KM44C/V40(1)04CS
VCC DQ0 DQ1 W RAS *A11(N.C) A10 A0 A1 A2 A3 VCC
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VSS DQ3 DQ2 CAS OE A9 A8 A7 A6 A5 A4 VSS
VCC DQ0 DQ1 W RAS *A11(N.C) A10 A0 A1 A2 A3 VCC
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VSS DQ3 DQ2 CAS OE A9 A8 A7 A6 A5 A4 VSS
*A11 is N.C for KM44C/V4104C(5V/3.3V, 2K Ref. product) K : 300mil 26(24) SOJ S : 300mil 26(24) TSOP II
Pin Name A0 - A11 A0 - A10 DQ0 - 3 VSS RAS CAS W OE VCC N.C
Pin Function Address Inputs (4K Product) Address Inputs (2K Product) Data In/Out Ground Row Address Strobe Column Address Strobe Read/Write Input Data Output Enable Power(+5.0V) Power(+3.3V) No Connection (2K Ref. product)
KM44C4004C, KM44C4104C KM44V4004C, KM44V4104C
ABSOLUTE MAXIMUM RATINGS
Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Output Current Symbol VIN, VOUT VCC Tstg PD IOS Rating 3.3V -0.5 to +4.6 -0.5 to +4.6 -55 to +150 1 50 5V
CMOS DRAM
Units V V °C W mA
-1.0 to +7.0 -1.0 to +7.0 -55 to +150 1 50
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, TA= 0 to 70°C)
Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL 3.3V Min 3.0 0 2.0 -0.3*2 Typ 3.3 0 Max 3.6 0 VCC+0.3*1 0.8 Min 4.5 0 2.4 -1.0*2 5V Typ 5.0 0 Max 5.5 0 VCC+1.0*1 0.8 Units V V V V
*1 : VCC+1.3V/15ns(3.3V), VCC+2.0/20ns(5V), Pulse width is measured at VCC *2 : -1.3V/15ns(3.3V), -2.0/20ns(5V), Pulse width is measured at VSS
DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.)
Max Parameter Input Leakage Current (Any input 0VINVIN+0.3V, all other input pins not under test=0 Volt) 3.3V Output Leakage Current (Data out is disabled, 0VVOUTVCC) Output High Voltage Level(IOH=-2mA) Output Low Voltage Level(IOL=2mA) Input Leakage Current (Any input 0VINVIN+0.5V, all other input pins not under test=0 Volt) 5V Output Leakage Current (Data out is disabled, 0VVOUTVCC) Output High Voltage Level(IOH=-5mA) Output Low Voltage Level(IOL=4.2mA) Symbol II(L) IO(L) VOH VOL II(L) IO(L) VOH VOL Min -5 -5 2.4 -5 -5 2.4 Max 5 5 0.4 5 5 0.4 Units uA uA V V uA uA V V
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