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Part: KM48V2000B
Category:
Analog & Mixed-Signal Processing
-> Amplifiers
-> High Dynamic Range Amplifiers
Description: 2m X 8bit CMOS Dynamic RAM With Fast Page Mode
Company: Samsung Semiconductor, Inc.
Datasheet: Download KM48V2000B datasheet File size : 2120 kB
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Datasheet text preview:
KM48C2000B, KM48C2100B KM48V2000B, KM48V2100B
2M x 8Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
CMOS DRAM
This is a family of 2,097,152 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-5,-6 or -7), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CASbefore-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 2Mx8 Fast Page Mode DRAM family is fabricated using Samsung's advanced CMOS process to realize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
FEATURES
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Fast Page Mode operation Byte/Word Read/Write operation CAS-before-RAS refresh capability RAS-only and Hidden refresh capability Self-refresh capability (L-ver only) Fast parallel test mode capability TTL(5V)/LVTTL(3.3V) compatible inputs and outputs Early Write or output enable controlled write JEDEC Standard pinout Available in Plastic SOJ and TSOP(II) packages Single +5V¡¾10% power supply (5V product) Single +3.3V¡¾0.3V power supply (3.3V product)
Part Identification - KM48C2000B/B-L (5V, 4K Ref.) - KM48C2100B/B-L (5V, 2K Ref.) - KM48V2000B/B-L (3.3V, 4K Ref.) - KM48V2100B/B-L (3.3V, 2K Ref.)
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Active Power Dissipation Unit : mW Speed -5 -6 -7 3.3V 4K 324 288 252 2K 396 360 324 4K 495 440 385 5V 2K 605 550 495
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FUNCTIONAL BLOCK DIAGRAM
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Refresh Cycles Part NO. C2000B V2000B C2100B V2100B VCC 5V 3.3V 5V 3.3V Refresh cycle 4K 2K Refresh period Normal 64ms 128ms 32ms
Refresh Timer Refresh Control Refresh Counter Row Decoder Sense Amps & I/O
L-ver
RAS CAS W
Control Clocks
VBB Generator
Vcc Vss Data in Buffer
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Performance Range Speed -5 -6 -7
Memory Array 2,097,152 x 8 Cells
DQ0 to DQ7
tRAC
50ns 60ns 70ns
tCAC
13ns 15ns 20ns
tRC
90ns 110ns 130ns
tPC
35ns 40ns 45ns
Remark 5V/3.3V 5V/3.3V 5V/3.3V
A0-A11 (A0 - A10)*1 A0 - A8 (A0 - A9)*1
Row Address Buffer Col. Address Buffer Column Decoder
Data out Buffer OE
Note) *1 : 2K Refresh
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
KM48C2000B, KM48C2100B KM48V2000B, KM48V2100B
CMOS DRAM
PIN CONFIGURATION (Top Views)
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KM48C/V20(1)00BK
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KM48C/V20(1)00BS
VCC DQ0 DQ1 DQ2 DQ3 W RAS *A11(N.C) A10 A0 A1 A2 A3 VCC
1 ¡Û 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VSS DQ7 DQ6 DQ5 DQ4 CAS OE A9 A8 A7 A6 A5 A4 VSS
VCC DQ0 DQ1 DQ2 DQ3 W RAS *A11(N.C) A10 A0 A1 A2 A3 VCC
1 ¡Û 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VSS DQ7 DQ6 DQ5 DQ4 CAS OE A9 A8 A7 A6 A5 A4 VSS
*A11 is N.C for KM48C/V2100B(5V/3.3V, 2K Ref. product) K : 300mil 28 SOJ S : 300mil 28 TSOP II
Pin Name A0 - A11 A0 - A10 DQ0 - 7 VSS RAS CAS W OE VCC N.C
Pin Function Address Inputs (4K Product) Address Inputs (2K Product) Data In/Out Ground Row Address Strobe Column Address Strobe Read/Write Input Data Output Enable Power(+5V) Power(+3.3V) No Connection (2K Ref. product)
KM48C2000B, KM48C2100B KM48V2000B, KM48V2100B
ABSOLUTE MAXIMUM RATINGS
Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Output Current Symbol VIN,VOUT VCC Tstg PD IOS Rating 3.3V -0.5 to +4.6 -0.5 to +4.6 -55 to +150 1 50
CMOS DRAM
5V -1.0 to +7.0 -1.0 to +7.0 -55 to +150 1 50
Units V V ¡É W mA
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, T A= 0 to 70¡É)
Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL 3.3V Min 3.0 0 2.0 -0.3*2 Typ 3.3 0 Max 3.6 0 VCC+0.3*1 0.8 Min 4.5 0 2.4 -1.0*2 5V Typ 5.0 0 Max 5.5 0 VCC+1.0*1 0.8 Units V V V V
*1 : VCC+1.3V/15ns(3.3V), VCC+2.0V/20ns(5V), Pulse width is measured at VCC *2 : -1.3V/15ns(3.3V), -2.0V/20ns(5V), Pulse width is measured at VSS
DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.)
Max Parameter Input Leakage Current (Any input 0¡ÂVIN¡ÂVIN+0.3V, all other input pins not under test=0 Volt) 3.3V Output Leakage Current (Data out is disabled, 0V¡ÂVOUT¡ÂVCC) Output High Voltage Level(IOH=-2mA) Output Low Voltage Level(IOL=2mA) Input Leakage Current (Any input 0¡ÂVIN¡ÂVIN+0.5V, all other input pins not under test=0 Volt) 5V Output Leakage Current (Data out is disabled, 0V¡ÂVOUT¡ÂVCC) Output High Voltage Level(IOH=-5mA) Output Low Voltage Level(IOL=4.2mA) Symbol II(L) IO(L) VOH VOL II(L) IO(L) VOH VOL Min -5 -5 2.4 -5 -5 2.4 Max 5 5 0.4 5 5 0.4 Units uA uA V V uA uA V V
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