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Part: KM48V2104CS-L

Category:
 Memory
   -> DRAM
     -> Async DRAM
       -> Modules
             -> SODIMM

Description: Description = KMM466F213CS2 2M X 64 DRAM Sodimm Using 2MX8, 2K & 4K Refresh, 3.3V, Low Power/self-refresh ;; Density(MB) = 16 ;; Organization = 2Mx64 ;; Mode = Edo ;; Refresh = 2K/32ms ;; Speed(ns) = 50,60 ;; #of Pin = 144 ;; Component Composition = (2Mx8)x8+EEPROM ;; Production Status = Eol ;; Comments = 4 Layer PCB,unbuffered

Company: Samsung Semiconductor, Inc.

Datasheet: Download KM48V2104CS-L datasheet     File size : 2120 kB

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Datasheet text preview:
DRAM MODULE
KMM466F203CS2-L KMM466F213CS2-L
2Mx64 SODIMM
(2MX8 Base)
Revision 2.0 November 1997
-1-
Rev. 2.0 (Nov. 1997)
DRAM MODULE
Revision History
Version 2.0 (November 1997)
· Changed module PCB from 6-Layer to 4-Layer.
KMM466F203CS2-L KMM466F213CS2-L
-2-
Rev. 2.0 (Nov. 1997)
DRAM MODULE
KMM466F203CS2-L KMM466F213CS2-L
KMM466F203CS2-L & KMM466F213CS2-L EDO Mode 2M x 64 DRAM SODIMM using 2MX8, 2K & 4K Refresh, 3.3V, Low power/Self-Refresh
GENERAL DESCRIPTION
The Samsung KMM466F20(1)3CS2-L is a 2Mx64bits Dynamic RAM high density memory module. The Samsung KMM466F20(1)3CS2-L consists of eight CMOS 2Mx8bits DRAMs in TSOP 400mil packages and a 1K or 2K EEPROM in 8-pin TSSOP package mounted on a 144-pin glass-epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. The KMM466F20(1)3CS2-L is a Small Out-line Dual in-line Memory Module and is intended for mounting into 144 pin edge connector sockets.
FEATURES
· Part Identification - KMM466F203CS2-L(4096 cycles/128ms, TSOP, L-ver) - KMM466F213CS2-L(2048 cycles/128ms, TSOP, L-ver) · Extended Data Out Mode Operation · New JEDEC standard proposal with EEPROM · Serial Presense Detect with EEPROM · CAS-before-RAS Refresh capability · Self -refresh capability · RAS-only and Hidden refresh capability · LVTTL compatible inputs and outputs · Single +3.3Vą0.3V power supply · PCB : Height(1000mil), Double sided component
PERFORMANCE RANGE
Speed -L5 -L6
tRAC
50ns 60ns
tCAC
13ns 15ns
tRC
90ns 110ns
tHPC
25ns 30ns
PIN CONFIGURATIONS
Pin Front Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CAS0 CAS1 VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 Back VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 VSS CAS4 CAS5 VCC A3 A4 A5 VSS DQ40 DQ41 DQ42 DQ43 VCC DQ44 Pin 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 Front DQ13 DQ14 DQ15 VSS RSVD RSVD RFU VCC RFU W RAS0 NC OE VSS RSVD RSVD VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 Pin 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 Back DQ45 DQ46 DQ47 VSS RSVD RSVD RFU VCC RFU RFU RFU RFU RFU VSS RSVD RSVD VCC DQ48 DQ49 DQ50 DQ51 VSS DQ52 DQ53 Pin 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 Front Pin DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC CAS2 CAS3 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS **SDA VCC 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 Back DQ54 DQ55 VCC A7 N.C VSS NC A11 VCC CAS6 CAS7 Vss DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 Vss **SCL VCC
PIN NAMES
Pin Name A0 to 11 A0 to 10 DQ0 - DQ63 W OE RAS0 CAS0 - CAS7 VCC VSS NC **SDA **SCL RSVD RFU Function Address Inputs (4K ref.) Address Inputs (2K ref.) Data In/Out Read/Write Enable Output Enable Row Address Strobe Colume Address Strobe Power(+3.3V) Ground No Connection Serial Address / Data I/O Serial Clock Reserved Use Reserved for Future Use
* These pins are not used in this module. * * These pins should be NC in the system which does not support SPD.
Note : A11 is used for only KMM466F203CS2-L (4K ref.)
-3-
Rev. 2.0 (Nov. 1997)


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