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Details, datasheet, quote on part number:KM616V1002A-20
 
 
Part:KM616V1002A-20
Category:Memory => SRAM => Async. SRAM => 1 Mb => Fast SRAM
Description:Description = KM616V1002A 64K X 16 Bit High-speed CMOS Static RAM(3.3V Operating) ;; Organization = 64Kx16 ;; Vcc(V) = 3.3 ;; Speed-tAA(ns) = 12,15,20 ;; Operating Temperature = C,i ;; Operating Current(mA) = 170 ;; Standby Current(mA) = 5 ;; Package = 44SOJ,44TSOP2 ;; Production Status = Eol ;; Comments = -
Company:Samsung Semiconductor, Inc.
Datasheet:Download KM616V1002A-20 datasheet   File size : 197 kB
Request For quote:  Find where to buy KM616V1002A-20
 



Datasheet text preview:
PRELIMINARY
KM616V1002A, KM616V1002AI
Document Title
64Kx16 High Speed Static RAM(3.3V Operating), Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range.
CMOS SRAM
Revision History
Rev. No. Rev. 0.0 Rev. 1.0 History Initial release with Design Target. Release to Preliminary Data Sheet. 1.1. Replace Design Target to Preliminary Release to final Data Sheet. 2.1. Delete Preliminary Add Low Power Product and update D.C parameters. 3.1. Add Low Power Products with Isb1=0.5mA and Data Retention Mode(L-ver. only) 3.2. Update D.C parameters Previous spec. Updated spec. Items (12/15/17/20ns part) (12/15/17/20ns part) Icc 200/190/180/170mA 170/165/165/160mA Isb 30mA 20mA Isb1 10mA 5mA Add Industrial Temperature Range parts 4.1. Add Industrial Temperature Range parts with the same parameters as Commercial Temperature Range parts. 4.1.1. Add KM616V1002AI/ALI parts for Industrial Temperature Range. 4.1.2. Add ordering information. 4.1.3. Add the condition for operating at Industrial Temp. Range. 4.2. Add timing diagram to define tWP1 as (Timing Wave Form of Write Cycle(OE=Low fixed) 5.1. Delete L-version. 5.2. Delete Data Retention Characteristics and Wavetorm. 5.3. Delete 17ns Part 5.4. Add Capacitive load of the test environment in A.C test load Draft Data Jan. 18th, 1995 Apr. 22th, 1995 Remark Design Target Preliminary
Rev. 2.0
Feb. 29th, 1996
Final
Rev. 3.0
Jul. 16th, 1996
Final
Rev. 4.0
Jun. 2nd, 1997
Final
Rev. 5.0
Feb. 25th, 1998
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 5.0 February 1998
PRELIMINARY
KM616V1002A, KM616V1002AI
64K x 16 Bit High-Speed CMOS Static RAM(3.3V Operating)
FEATURES
· Fast Access Time 12, 15, 20ns(Max.) · Low Power Dissipation Standby (TTL) : 20mA(Max.) (CMOS) : 5mA(Max.) Operating KM616V1002A - 12 : 170mA(Max.) KM616V1002A - 15 : 165mA(Max.) KM616V1002A - 20 : 160mA(Max.) · Single 3.3 ±0.3V Power Supply · TTL Compatible Inputs and Outputs · Fully Static Operation - No Clock or Refresh required · Three State Outputs · Center Power/Ground Pin Configuration · Data Byte Control : LB:I/O1~I/O8, UB:I/O9~I/O16 · Standard Pin Configuration KM616V1002AJ : 44-SOJ-400 KM616V1002AT : 44-TSOP2-400F
CMOS SRAM
GENERAL DESCRIPTION
The KM616V1002A is a 1,048,576-bit high-speed Static Random Access Memory organized as 65,536 words by 16 bits. The KM616V1002A uses 16 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. Also it allows that lower and upper byte access by data byte control (UB, LB). The device is fabricated using SAMSUNGs advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The KM616V1002A is packaged in a 400mil 44-pin plastic SOJ or TSOP2 forward.
PIN CONFIGURATION (Top View)
A0 A1 A2 A3 A4 CS I/O1 I/O2 I/O3 1 2 3 4 5 6 7 8 9 44 A15 43 A14 42 A13 4 1 OE 40 UB 39 LB 38 I/O16 37 I/O15 36 I/O14
ORDERING INFORMATION
KM616V1002A -12/15/20 KM616V1002AI -12/15/20 Commercial Temp. Industrial Temp.
I/O4 10 Vcc 11 Vss 12 I/O5 13 I/O6 14 I/O7 15 I/O8 16 WE 17 A5 18
SOJ/ TSOP2
35 I/O13 34 Vss 33 Vcc 32 I/O12 31 I/O11 30 I/O10 29 I/O9 28 N.C. 27 A12 26 A11 25 A10 24 A9 23 N.C.
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A1 A2 A3 A4 A5 A6 A7 A8 A9 I/O1 ~I/O8 I/O9 ~I/O16
Pre-Charge Circuit
Row Select
Memory Array 512 Rows 128x16 Columns
A6 19 A7 20 A8 21 N.C. 22
Data Cont. Data Cont. Gen. CLK
I/O Circuit & Column Select
PIN FUNCTION
Pin Name A0 - A15 WE Pin Function Address Inputs Write Enable Chip Select Output Enable Lower-byte Control(I/O1~I/O8) Upper-byte Control(I/O9~I/O16) Data Inputs/Outputs Power(+3.3V) Ground No Connection
A0 A1 0 A1 1 A12 A13 A14 A15
CS OE LB
WE OE UB LB CS
UB I/O1 ~ I/O16 VCC VSS N.C
-2-
Rev 5.0 February 1998
PRELIMINARY
KM616V1002A, KM616V1002AI
ABSOLUTE MAXIMUM RATINGS*
Parameter Voltage on Any Pin Relative to VSS Voltage on VCC Supply Relative to VSS Power Dissipation Storage Temperature Operating Temperature Commercial Industrial Symbol VIN, VOUT VCC PD TSTG TA TA Rating -0.5 to 4.6 -0.5 to 4.6 1.0 -65 to 150 0 to 70 -40 to 85 Unit V V
CMOS SRAM
W °C °C °C
* Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS(TA=0 to 70°C)
Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL Min 3.0 0 2.2 -0.3* Typ 3.3 0 Max 3.6 0 VCC + 0.3** 0.8 Unit V V V V
NOTE: The above parameters are also guaranteed at industrial temperature range. * VIL(Min) = -2.0V a.c(Pulse Width10ns) for I20mA ** VIH(Max) = VCC + 2.0V a.c (Pulse Width10ns) for I20mA
DC AND OPERATING CHARACTERISTICS(TA=0 to 70°C, Vcc=3.3±0.3V, unless otherwise specified)
Parameter Input Leakage Current Output Leakage Current Operating Current SymILI ILO ICC Test Conditions VIN = VSS to VCC CS=VIH or OE=VIH or WE=VIL VOUT=VSS to VCC Min. Cycle, 100% Duty CS=VIL, VIN=VIH or VIL, IOUT=0mA Min. Cycle, CS=VIH f=0MHz, CS VCC-0.2V, VINVCC-0.2V or VIN0.2V IOL=8mA IOH=-4mA 12ns 15ns 20ns Standby Current ISB ISB1 Output Low Voltage Level Output High Voltage Level VOL VOH Min -2 -2 2.4 Max 2 2 170 165 160 20 5 0.4 mA mA V V Unit µA µA mA
NOTE: The above parameters are also guaranteed at industrial temperature range.
CAPACITANCE*( TA=25°C, f=1.0MHz)
Item Input/Output Capacitance Input Capacitance Symbol CI/O CIN Test Conditions VI/O=0V VIN=0V MIN Max 8 6 Unit pF pF
* NOTE : Capacitance is sampled and not 100% tested.
-3-
Rev 5.0 February 1998