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Details, datasheet, quote on part number:KM6264BLP-7L
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Datasheet text preview:
KM6264B Family
8Kx8 bit Low Power CMOS Static RAM FEATURE SUMMARY
· Process Technology : CMOS · Organization : 8K x 8 · Power Supply Voltage : Single 5V ± 10% · Low Data Retention Voltage : 2V(Min) · Three state output and TTL Compatible · Package Type : JEDEC Standard 28-DIP, 28-SOP
CMOS SRAM
GENERAL DESCRIPTION
The KM6264B family is fabricated by SAMSUNG's advanced CMOS process technology. The family can support various operating temperature ranges and has various package types for user flexibility of system design. The family also support low data retention voltage for battery back-up operations with low data retention current.
PRODUCT FAMILY
Product Family KM6264BL KM6264BL-L KM6264BLE KM6264BLE-L KM6264BLI KM6264BLI-L Operating Temperature Commercial (0~70 °C) Extended (-25~-85 °C) Industrial (-40~85 °C) Speed PKG Type Power Dissipation Standby(Isb1, Max) Operating(Icc2) 100uA 70/100/120ns 28-DIP, 28-SOP 100*ns 100*ns 28-SOP 28-SOP 10uA 100uA 50uA 100uA 50uA 55mA
* measured with 30pF test load
PIN DESCRIPTION
N.C A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 Vcc /WE
FUNCTIONAL BLOCK DIAGRAM
Y-Decoder X-Decoder
CS2 A8 A9 A11 /OE A10 /CS1 I/O8 I/O7 I/O6 I/O5 I/O4
Control Logic
Cell Array
A0~A12
28-Pin DIP 28-Pin SOP
22 21 20 19 18 17 16 15
I/O1~8
I/O Buffer Function
/CS1, CS2 /WE, /OE
Pin Name A0~A12 /WE /CS1, CS2 /OE I/O1~I/O8 Vcc Vss N.C
Address Inputs Write Enable Input Chip Select Input Output Enable Input Data Input/Output Power(5V) Ground No Connection
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ELECTRONICS
Revision. 0.0 Auust. 1996
KM6264B Family
PRODUCT LIST & ORDERING INFORMATION
PRODUCT LIST
Commercial Temp Products (0~70 °C) Part Name
KM6264BLP-7 KM6264BLP-7L KM6264BLP-10 KM6264BLP-10L KM6264BLP-12 KM6264BLP-12L KM6264BLG-7 KM6264BLG-7L KM6264BLG-10 KM6264BLG-10L KM6264BLG-12 KM6264BLG-12L
CMOS SRAM
Extended Temp Products (-25~85 °C) Part Name
KM6264BLGE-10 KM6264BLGE-10L
Industrial Temp Products (-40~85 °C) Part Name
KM6264BLGI-10 KM6264BLGI-10L
Function
28-DIP, 70ns, L-pwr 28-DIP, 70ns, , LL-pwr 28-DIP, 100ns, , L-pwr 28-DIP, 100ns, LL-pwr 28-DIP, 120ns, , L-pwr 28-DIP, 120ns, LL-pwr 28-SOP, 70ns, L-pwr 28-SOP, 70ns, LL-pwr 28-SOP, 100ns, L-pwr 28-SOP, 100ns, LL-pwr 28-SOP, 120ns, L-pwr 28-SOP, 120ns, LL-pwr
Function
28-SOP, 100ns, L-pwr 28-SOP, 100ns, LL-pwr
Function
28-SOP, 100ns, L-pwr 28-SOP, 100ns, LL-pwr
ORDERING INFORMATION K M6 2 X 64 B X X XX XX X
L-Low Low Power, Blank-Low Power or High Power Access Time : 7=70ns, 10=100ns, 12=120ns Operating Temperature : I=Industrial, E=Extended, Blank=Commercial Package Type : G=SOP, P=DIP, L-Low Power or Low Low Power, Blank-High Power Die Version : B=3rd generation Density : 64=64K bit Blank=5V Organization : 2= x8 SEC Standard SRAM
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ELECTRONICS
Revision. 0.0 Auust. 1996
KM6264B Family
ABSOLUTE MAXIMUM RATINGS *
Item Voltage on any pin relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Storage temperature Operating Temperature Symbol Vin, Vout Vcc Pd Tstg Ta Ratings -0.5 to Vcc+0.5 -0.5 to 7.0 1.0 -65 to 150 0 to 70 -25 to 85 -40 to 85 Soldering temperature and time Tsolder 260 °C, 10sec(Lead Only) Unit V V W °C °C °C °C -
CMOS SRAM
Remark KM6264BL/L-L KM6264BLE/LE-L KM6264BLI/LI-L -
* Stresses greater than those listed under 'Absolute Maximum Ratings' may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS*
Item Supply voltage Ground Input high voltage Input low voltage Symbol Vcc Vss Vih Vil Min 4.5 0 2.2 -0.5*** Typ** 5.0 0 Max 5.5 0 Vcc+0.5 0.8 Unit V V V V
* 1) Commercial Product : Ta=0 to 70 ° C, unless otherwise specified 2) Extended Product : Ta=-25 to 85 ° C, unless otherwise specified 3) Industrial Product : Ta=-40 to 85 ° C, unless otherwise specified ** Ta=25 ° C *** Vil(min)=-3.0V for ¡ Â 0ns pulse 5
CAPACITANCE * (f=1MHz, Ta=25 °C)
Item Input capacitance Input/Output capacitance Symbol Cin Cio Test Condition Vin=0V Vio=0V Min Max 6 8 Unit pF pF
* Capacitance is sampled not 100% tested
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ELECTRONICS
Revision. 0.0 Auust. 1996
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