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Details, datasheet, quote on part number:KMM372C803CK
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| Part: | KMM372C803CK |
| Category: | Memory => DRAM => Async DRAM => Modules => Buffered DIMM |
| Description: | Description = KMM372C803CK 8Mx72 DRAM Dimm With Ecc Using 8Mx8,4K&8K Refresh,5V ;; Density(MB) = 64 ;; Organization = 8Mx72 ;; Mode = Fast Page ;; Refresh = 4K/64ms ;; Speed(ns) = 50,60 ;; #of Pin = 168 ;; Component Composition = (8Mx8)x9+Drive ICx2 ;; Production Status = Eol ;; Comments = Buffered |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KMM372C803CK datasheet File size : 426 kB |
| Request For quote: | Find where to buy KMM372C803CK
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Datasheet text preview:
DRAM MODULE
KMM372C80(8)3CK/CS
Buffered 8Mx72 DIMM
(8Mx8 base)
Revision 0.0 June 1999
DRAM MODULE
Revision History
Version 0.0 (June 1999)
· The 4th. generation of 64Mb DRAM components are applied for this module.
KMM372C80(8)3CK/CS
DRAM MODULE
KMM372C80(8)3CK/CS
KMM372C80(8)3CK/CS Fast Page Mode 8Mx72 DRAM DIMM with ECC Using 8Mx8, 4K & 8K Refresh, 5V
GENERAL DESCRIPTION
The Samsung KMM372C80(8)3C is a 8Mx72bits Dynamic RAM high density memory module. The Samsung KMM372C80(8)3C consists of nine CMOS 8Mx8bits DRAMs in SOJ/TSOP-II 400mil packages and two 16 bits driver IC in TSSOP package mounted on a 168-pin glass-epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. The KMM372C80(8)3C is a Dual In-line Memory Module and is intended for mounting into 168 pin edge connector sockets.
FEATURES · Part Identification
Part number KMM372C803CK KMM372C803CS KMM372C883CK KMM372C883CS · · · · · · · · PKG SOJ TSOP SOJ TSOP 8K 4K/64ms 8K/64ms Ref. 4K CBR Ref. ROR Ref. 4K/64ms
PERFORMANCE RANGE
Speed -5 -6
tR A C
50ns 60ns
tC A C
18ns 20ns
tR C
90ns 110ns
tP C
35ns 40ns
Fast Page Mode Operation CAS-before-RAS Refresh capability RAS-only and Hidden refresh capability TTL compatible inputs and outputs Single 5Vą10% power supply JEDEC standard pinout & Buffered PDpin Buffered input except RAS and DQ PCB : Height(1250mil), single sided component
PIN CONFIGURATIONS
P i n F r o n t P i n F r o n t P i n Front 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VCC DQ14 DQ15 DQ16 DQ17 VSS RSVD RSVD VCC W0 CAS0 2 9 *CAS2 3 0 RAS0 31 OE0 V SS 32 A0 33 A2 34 A4 35 A6 36 A8 37 A10 38 A12 39 VCC 40 4 1 RFU 4 2 RFU 43 V SS OE2 44 4 5 RAS2 4 6 CAS4 4 7 *CAS6 48 W2 49 VCC 50 RSVD 51 RSVD 5 2 DQ18 5 3 DQ19 54 V SS 5 5 DQ20 5 6 DQ21 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 DQ22 DQ23 VCC DQ24 RFU RFU RFU RFU DQ25 DQ26 DQ27 VSS DQ28 DQ29 DQ30 DQ31 VCC DQ32 DQ33 DQ34 DQ35 VSS PD1 PD3 PD5 PD7 ID0 VCC Pin 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Back V SS DQ36 DQ37 DQ38 DQ39 VCC DQ40 DQ41 DQ42 DQ43 DQ44 V SS DQ45 DQ46 DQ47 DQ48 DQ49 VCC DQ50 DQ51 DQ52 DQ53 V SS RSVD RSVD VCC RFU *CAS1 Pin 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 Back *CAS3 *RAS1 RFU VSS A1 A3 A5 A7 A9 A11 *A13 VCC RFU B0 VSS RFU *RAS3 *CAS5 *CAS7 PDE VCC RSVD RSVD DQ54 DQ55 VSS DQ56 DQ57 Pin 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Back DQ58 DQ59 VCC DQ60 RFU RFU RFU RFU DQ61 DQ62 DQ63 VSS DQ64 DQ65 DQ66 DQ67 VCC DQ68 DQ69 DQ70 DQ71 VSS PD2 PD4 PD6 PD8 ID1 VCC
PIN NAMES
Pin Names A0, B0, A1 - A11 A0, B0, A1 - A12 DQ0 - DQ71 W0, W2 OE0, OE2 RAS0, RAS2 CAS0, CAS4 VCC V SS NC PDE PD1 - 8 ID0 - 1 RSVD RFU Function Address Input(4K ref.) Address Input(8K ref.) Data In/Out Read/Write Enable Output Enable Row Address Strobe Column Address Strobe Power(+5V) Ground No Connection Presence Detect Enable Presence Detect ID bit Reserved Use Reserved for Future Use
Pins marked * are not used in this module.
PD & ID Table
Pin PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 ID0 50NS 1 0 1 1 0 0 0 0 0 60NS 1 0 1 1 0 1 1 0 0 0
NOTE : A12 is used for only KMM372C883CK/CS (8K Ref.)
ID1 0 PD Note :PD & ID Terminals must each be pulled up through a resistor to VCC at the next higher level assembly. PDs will be either open (NC) or driven to VSS via on-board buffer circuits. PD : 0 for Vol of Drive IC & 1 for N.C ID Note : IDs will be either open (NC) or connected directly to VSS without a buffer. ID : 0 for Vss & 1 for N.C
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