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Part: KMM5322104CKU
Category:
Memory
-> DRAM
-> Async DRAM
-> Modules
-> SIMM
Description: Description = KMM5322104CKU 2MB X 32 DRAM Simm Using 2MB X 8, 2KB Refresh, 5V ;; Density(MB) = 8 ;; Organization = 2Mx32 ;; Mode = Edo ;; Refresh = 2K/32ms ;; Speed(ns) = 50, 60 ;; #of Pin = 72 ;; Component Composition = (2Mx8)x4 ;; Production Status = Eol ;; Comments = -
Company: Samsung Semiconductor, Inc.
Datasheet: Download KMM5322104CKU datasheet File size : 543 kB
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Datasheet text preview:
DRAM MODULE
KMM5322104CKU/CKUG
KMM5322104CKU/CKUG Fast Page Mode with Extended Data Out 2M x 32 DRAM SIMM using 2Mx8 , 2K Refresh, 5V
GENERAL DESCRIPTION
The Samsung KMM5322104CKU is a 2Mx32bits RAM high density memory module. The Dynamic Samsung
FEATURES
· Part Identification - KMM5322104CKU(2048 cycles/32ms Ref, SOJ, Solder) - KMM5322104CKUG(2048 cycles/32ms Ref, SOJ, Gold) · Fast Page Mode with Extended Data Out · CAS-before-RAS refresh capability · RAS-only and Hidden refresh capability · TTL compatible inputs and outputs · Single +5V±10% power supply · JEDEC standard PDPin & pinout · PCB : Height(1000mil), single sided component
KMM5322104CKU consists of four CMOS 2Mx8bits DRAMs in 28-pin SOJ package mounted on a 72-pin glass-epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. The KMM5322104CKU is a Single In-line Memory Module with edge connections and is intended for mounting into 72 pin edge connector sockets.
PERFORMANCE RANGE
Speed -5 -6
tRAC
50ns 60ns
tCAC
13ns 15ns
tRC
90ns 110ns
tHPC
25ns 30ns
PIN CONFIGURATIONS
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Symbol VSS DQ0 DQ18 DQ1 DQ19 DQ2 DQ20 DQ3 DQ21 Vcc NC A0 A1 A2 A3 A4 A5 A6 A10 DQ4 DQ22 DQ5 DQ23 DQ6 DQ24 DQ7 DQ25 A7 Res(A11) Vcc A8 A9 Res(RAS1) RAS0 NC NC Pin 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Symbol NC NC Vss CAS0 CAS2 CAS3 CAS1 RAS0 Res(RAS1) NC W NC DQ9 DQ27 DQ10 DQ28 DQ11 DQ29 DQ12 DQ30 DQ13 DQ31 Vcc DQ32 DQ14 DQ33 DQ15 DQ34 DQ16 NC PD1 PD2 PD3 PD4 NC Vss
PIN NAMES
Pin Name A0 - A10 DQ0 - DQ31 W RAS0 CAS0 - CAS3 PD1 -PD4 Vcc Vss NC Res Function Address Inputs Data In/Out Read/Write Enable Row Address Strobe Column Address Strobe Presence Detect Power(+5V) Ground No Connection Reserved Pin
PRESENCE DETECT PINS (Optional)
Pin PD1 PD2 PD3 PD4 50NS NC NC Vss Vss 60NS NC NC NC NC
* Pin connection changing available
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
DRAM MODULE
FUNCTIONAL BLOCK DIAGRAM
KMM5322104CKU/CKUG
RAS0 CAS0
DQ0 DQ1 DQ2 CAS DQ3 U0 DQ4 DQ5 OE DQ6 W A0-A10 DQ7 RAS
DQ0-DQ7
CAS1
DQ0 DQ1 DQ2 CAS DQ3 U1 DQ4 DQ5 OE DQ6 W A0-A10 DQ7 RAS
DQ8-DQ15
CAS2
DQ0 DQ1 DQ2 CAS DQ3 U2 DQ4 DQ5 OE DQ6 W A0-A10 DQ7 RAS
DQ16-DQ23
CAS3
DQ0 DQ1 DQ2 CAS DQ3 U3 DQ4 DQ5 OE DQ6 W A0-A10 DQ7 RAS
DQ24-DQ31
W A0-A10
Vcc Vss
.1 or .22uF Capacitor for each DRAM
To all DRAMs
DRAM MODULE
ABSOLUTE MAXIMUM RATINGS *
Item Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Output Current Symbol VIN, VOUT VCC Tstg Pd IOS
KMM5322104CKU/CKUG
Rating -1 to +7.0 -1 to +7.0 -55 to +150 4 50 Unit V V °C W mA
* Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for intended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS (Voltage referenced to VSS, TA = 0 to 70°C)
Item Supply Voltage Ground Input High Voltage Input Low Voltage *1 : VCC+2.0V/20ns, Pulse width is measured at VCC. *2 : -2.0V/20ns, Pulse width is measured at VSS. Symbol VCC VSS VIH VIL Min 4.5 0 2.4 -1.0
*2
Typ 5.0 0 -
Max 5.5 0 VCC+1*1 0.8
Unit V V V V
DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted)
Symbol ICC1 ICC2 ICC3 ICC4 ICC5 ICC6 II(L) IO(L) VOH VOL ICC1 ICC2 ICC3 ICC4 ICC5 ICC6 II(L) IO(L) VOH VOL Speed -5 -6 Dont care -5 -6 -5 -6 Dont care -5 -6 Dont care Dont care KMM5322104CKU/CKUG Min
-
Max 440 400 8 440 400 360 320 4 440 400 20 5 0.4
Unit mA mA mA mA mA mA mA mA mA mA uA uA V V
-20 -5 2.4 -
: Operating Current * (RAS, CAS, Address cycling @tRC=min) : Standby Current (RAS=CAS=W=VIH) : RAS Only Refresh Current * (CAS=VIH, RAS cycling @tRC=min) : EDO Mode Current * (RAS=VIL, CAS cycling : tHPC=min) : Standby Current (RAS=CAS=W=Vcc-0.2V) : CAS-Before-RAS Refresh Current * (RAS and CAS cycling @tRC=min) : Input Leakage Current (Any input 0VINVcc+0.5V, all other pins not under test=0 V) : Output Leakage Current(Data Out is disabled, 0VVOUTVcc) : Output High Voltage Level (IOH = -5mA) : Output Low Voltage Level (IOL = 4.2mA)
* NOTE : ICC1 , ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with the output open. ICC is specified as an average current. In ICC1 and ICC3, address can be changed maximum once while RAS=VIL. In ICC4, address can be changed maximum once within one EDO mode cycle, tHPC.
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