|
Details, datasheet, quote on part number:KS0068B-00
| |
| Part: | KS0068B-00 |
| Category: | Optoelectronics => BW STN |
| Description: | Description = KS0068B 60SEG/16COM Controller ;; Segment/ Common = 60/16 ;; GRAM(Bits) = - ;; Interface = 4/8 ;; VDD(V) = 2.7~5.5 ;; VLCD (Max.V) = 10 ;; Built-in Power Circuit = - ;; DC/DC Convert (Times) = - ;; Package = Bare Die ;; Production Status = Mass Production |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KS0068B-00 datasheet File size : 316 kB |
| Request For quote: | Find where to buy KS0068B-00
|
| |
Datasheet text preview:
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTRODUCTION
100 QFP T he KS0068B is a dot matrix LCD driver & controller LSl which is fabricated by low power CMOS technology.
FUNCTION
· Character type dot matrix LCD driver & controller · Internal driver: 16 common and 60 segment signal output. · Display character format; 5
7 dots + cursor, 5
10 dots + cursor · Easy interface with a 4-bit or 8-bit MPU · Display character pattern: 5
7 dots format: 192 kinds, 5
10 dots format: 32kinds · The special character pattern can be programmable by Character Generator RAM directly. · A customer character pattern can be programmable by mask option (KS0068B-00; Standard type) KS00 68B-00 English, Japanese Numberal · Automatic power on reset function. · It can drive a maximum 80 characters by using the kS0065B or KS0063B, KS0068B externally. · It is possible to read both Character Generator and Display Data RAM from MPU.
FEATURES
· Internal Memory - Character Generator ROM: 8320bits - Character Generator RAM: 512 bits - Display Data RAM: 80
8bits for 80 digits. · Power Supply Voltage; +5Vä10%, +3Vä10% · Supply voltage for display: 0~-5V(V5) · CMOS process · 1/8 duty, 1/11 duty or 1/16 duty: selectable (1/8 duty; 5
7 dots format 1 line, 1/11 duly; 5 x 10 dots format I line, 1/16 duty: 5
7 dots format 2 line) · 100 QFP or bare chip available.
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
Powe r su pply for LCD Dr iv e V1 V2 V3 V4 V5 5 5 Par allel/Se ria l Dat a conversion Circ uit
Busy Fla g
Cha ra ter Gen e rato r ROM ( CG ROM ) 83 20 bits
Cha ra cte r Gen e rato r RA M ( CG RAM ) 51 2 bits
Cur sor Blink Con tr ol Circ uit se gm ent
DB0 ~ DB3 DB4 ~ DB 7
4 4 8 Inp ut Out pu t Buff er Dat a Reg iste r ( DR ) 8 7 Displa y 8 Inst ru ctio n Reg iste r ( IR ) 8 Inst ru ctio n Dec ode r ( ID ) 7 7 Dat a RAM ( DD RAM ) 80 8 8 60 - bit Shift Reg iste r 60 60 - bit La tch Circ uit 60
sign al ( S1 - S60 ) Seg me nt 60 Signa l Dr iv er
R/W RS E
!8 bits
D
7
Address Cou nte r ( AC ) 7
7 co mm on sign al ( C 1 - C16 )
16 - bit Shift Reg iste r
16
Com mo n Signa l Dr iv er
16
OSC 1 OSC 2
Tim ing Gen e ratio n Circ uit
CLK1 CLK2 M
VDD GND
Fig. 1. KS0068 functional block diagram.
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN CONFIGURATION
C16
C15
C14
C13
C12
C11
C10
S4 7
S4 8
S4 9
S5 0
S5 1
S5 2
S5 3
S5 4
S5 5
S5 6
S5 7
S5 8
S5 9
S6 0
C9
C8
C7
C6
C5
C4
C3
C2 52
80 S 46 S 45 S 44 S 43 S 42 S 41 S 40 S 39 S 38 S 37 S 36 S 35 S 34 S 33 S 32 S 31 S 30 S 29 S 28 S 27 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
51 50 49 48 47 46 45 44 43 42 DB 7 DB 6 DB 5 DB 4 DB 3 DB 2 DB 1 DB 0 VD D E R /W RS D M C LK 2 C LK 1 V5 V4 V3 V2
KS0068B
KS 0068
C1
41 40 39 38 37 36 35 34 33 32 31
1 S2 6
2 S2 5
3 S2 4
4 S2 3
5 S2 2
6 S2 1
7 S2 0
8 S1 9
9 S1 8
10 S1 7
11 S1 6
12 S1 5
13 S1 4
14 S1 3
15 S1 2
16 S1 1
17 S1 0
18 S9
19 S8
20 S7
21 S6
22 S5
23 S4
24 S3
25 S2
26 S1
27 VS S
28 O S C2
29 O S C1
30 V1
F ig 2 . 100QFP Top View
Fig2. 100QFP Top View
|
|
