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Details, datasheet, quote on part number:KS0125
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| Part: | KS0125 |
| Category: | Multimedia => Video => Display & Video |
| Description: | Description = KS0125 Multimedia Video ;; Function = - ;; Features = CCIR601 And CCIR656 Inputs,ntsc/pal Output,internal Osd Function,vertical Interpolation Filter ;; Package = 80QFP ;; Production Status = Eol |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KS0125 datasheet File size : 694 kB |
| Request For quote: | Find where to buy KS0125
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Datasheet text preview:
KS0125 Data Sheet
MULTISTANDARD VIDEO ENCODER
The KS0125 is a multistandard video encoder with line inter polation, crisping circuits, and on-screen-display (OSD) functions. These special functions make this encoder well suited for MPEG playback applications, such as video compact disk (VCD), and digital video disk (DVD). 80 PQFP
Preliminary Information
MULTIMEDIA VIDEO
FEATURES
· Line interpolation · Crisping circuit to enhance horizontal resolution and to reduce MPEG mosquito effect · 250 character ROM containing the English and Japanese alphabets, Korean characters, numbers, and symbols. · 4 user selectable OSD character colors and 2 background colors · CCIR 601 or CCIR 656 input · NTSC-M or PAL-B,G,H output ORDERING INFORMATION Device KS0125 Package 80 PQFP Temperature Range 0°~+70°C
APPLICATIONS
· Multimedia
· Master or slave timing operation with EAV support · Digital Video for CCIR 656 input · VCD and DVD · Adjustable hue · Video Editing · 3 10-bit DACs for simultaneous CVBS and S-video output RELATED PRODUCTS · DACs support power-down mode · KS0122 Multistandard Video Decoder · KS0123 Multistandard Video Encoder
BLOCK DIAGRAM
I NT
HSYN VSYN ODD
Timing Generator
Syn c Pulse
Crisping P[15:0] Y Ver tical Filter C L PF
Interpolation Filter
DAC
LUMA
+
Inter polation Filter
DAC
CVBS
X
fsc Synthesizer
DAC
CHROMA
CKI27 XTLI XTLO Clock Circuit OSD RAM OSD Generator Color Burst
µP Interface
CKO
D[7:0] A0
CS
R/W
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ELECTRONICS
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Preliminary Information
KS0125 Data Sheet
PIN ASSIGNMENT - 80 PQFP
MULTIMEDIA VIDEO
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
IREF VREF VSS VSS VSS VSS CS VDD VDD R/W NC NC NC D7 D6 D5 D4 D3 D2 D1 D0 VDDA P15 A0
65 CHROMA 66 VSS 67 COMP 68 LUMA 69 VDDA 70 NC 71 CVBS 72 NC 73 NC 74 VSS 75 VDDA 76 VSS 77 VDD 78 INT 79 NC 80 NC HSYN CKI27 VSYN XTLO ODD CKO XTLI VDD VDD VSS VSS RST NC NC NC NC NC NC NC NC NC P0 P1 P2
P14 40 P13 39 VDD 3 8 VSS 3 7 P12 36 P11 35 P10 34 P9 3 3
KS0125
P8 3 2 P7 3 1 P6 3 0 P5 2 9 P4 2 8 VDD 2 7 VSS 2 6 P3 2 5
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
TYPICAL APPLICATION
The KS0125 is shown in a typical VCD or DVD application.
MPEG Decoder KS0125
VCD/DVD
NTSC/PAL TV
µController
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Preliminary Information
KS0125 Data Sheet
PIN DESCRIPTION
Pin Name DIGITAL VIDEO PORT P0 - P7 P8 - P15 22 - 25, 28 - 31 32 - 36, 39 - 41 I I Pin # Type Description
MULTIMEDIA VIDEO
For CCIR 601 data, these pins are the inputs for C0 - C7. For CCIR 656 data, these pins are the inputs for YC0 - YC7. These pins are for CCIR 601 Y0 - Y7 inputs only.
CLOCK AND TIMING XTLI XTLO CKI27 CKO HSYN VSYN ODD INT 4 5 2 6 21 20 19 78 I O I O I/O I/O I/O O 13.5 MHz crystal input, or 13.5 MHz CMOS clock input. 13.5 MHz crystal output. 27 MHz TTL clock input. Clock output. Active low horizontal sync. It is an output in master mode; an input in slave mode. Active low vertical sync. It is an output in master mode; an input in slave mode. Field flag. High for field 1; low for field 2. It is an output in master mode; an input in slave mode. Open drain, active low interrupt. It is triggered by the start of the vertical sync. Reset by software.
ANALOG VIDEO OUTPUT CVBS CHROMA LUMA 71 65 68 O O O Composite base band output. Chroma output. Luma output.
DAC REFERENCE AND COMPENSATION VREF IREF COMP 61 62 67 Voltage reference. The chip contains a 1.235 V internal band gap reference. Connect a 0.1 µF capacitor to VDDA. Current reference. A resistor with a nominal value of 787 should be connected to this pin and ground. Compensation capacitor for the DAC internal reference amplifier. A 0.1 µF ceramic capacitor is required between this pin and ground.
HOST INTERFACE A0 D0 - D7 CS 45 49 - 56 44 I I/O I Address line. Bidirectional data lines. Chip select strobe for data read and write.
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