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Part: KS57C5304
Category:
Microcontrollers
Description: The Ks57c5204/c5208/c5304/c5308/c5312 Single-chip CMOS Microcontroller Has Been Designed For Highperformance Using Sam 47 Samsung Arrangeable Microcon
Company: Samsung Semiconductor, Inc.
Datasheet: Download KS57C5304 datasheet File size : 256 kB
Request For quote: Find where to buy KS57C5304
Datasheet text preview:
KS57C5204/C5208/P5208/C5304/C5308/P5308/C5312/P5312PRODUCT OVERVIEW
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PRODUCT OVERVIEW
OVERVIEW
The KS57C5204/C5208/C5304/C5308/C5312 single-chip CMOS microcontroller has been designed for highperformance using SAM 47 (Samsung Arrangeable Microcontrollers). SAM 47, Samsung's newest 4-bit CPU core is notable for its low energy consumption and low operating voltage. You can select from three ROM sizes: 4K, 8K, or 12K bytes. Except for the difference in ROM size, the features and functions of the KS57C5204 and the KS57C5208 are identical and the KS57C5304, KS57C5308, and the KS57C5312 are identical. With it's DTMF generator, watchdog timer function, and versatile 8-bit timer/counters, the KS57C5204/C5208 /C5304/C5308/C5312 offers an excellent design solution for a wide variety of telecommunication applications. Up to 35 pins of the available 42-pin SDIP or 44-pin QFP package for the KS57C5204/C5208, and up to 23 pins of the available 30-pin SDIP or 32-pin SOP package for the KS57C5304/C5308/C5312 can be assign to I/O. Six vectored interrupts for KS57C5204/C5208 and four vectored interrupts for KS57C5304/C5308/C5312 provide fast response to internal and external events. In addition, the KS57C5204/C5208/C5304/C5308/C5312's advanced CMOS technology provides for low power consumption and a wide operating voltage range.
OTP
The KS57C5204/C5208 microcontroller is also available in OTP (One Time Programmable) version, KS57P5208. The KS57C5304/C5308/C5312 microcontroller is also available in OTP (One Time Programmable) version, KS57P5308/P5312. The KS57P5208/P5308/P5312 microcontroller has an on-chip 8K-byte (P5208/P5308) or 12K-byte (P5312) one-time-programable EPROM instead of masked ROM. The KS57P5208 is comparable to KS57C5204/C5208, both in function and in pin configuration. Also, the KS57P5308/P5312 is comparable to the KS57C5304/C5308/C5312, both in function and in pin configuration.
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PRODUCT OVERVIEW
K S57C5204/C5208/P5208/C5304/C5308/P5308/C5312/P5312
FEATURES
Memory · 768 × 4-bit RAM 4,096 × 8-bit ROM (KS57C5204/C5304) 8,192 × 8-bit ROM (KS57C5208/C5308) 12,288 × 8-bit ROM (KS57C5312) format Interrupts · 3 external interrupt vectors (KS57C5204/C5208) 1 external interrupt vectors (KS57C5304/C5308/C5312) 3 internal interrupt vectors 2 quasi-interrupts
I/O Pins · · · Input only: 4 pins (KS57C5204/C5208) 1 pins (KS57C5304/C5308/C5312) I/O: 35 pins (KS57C5204/C5208) 23 pins (KS57C5304/C5308/C5312) N-channel open-drain I/O: 8 pins
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Power-Down Modes · · Idle: Only CPU clock stops Stop: System clock stops
Memory-Mapped I/O Structure · Data memory bank 15
Oscillation Sources · · · Crystal, or ceramic for main system clock Main system clock frequency: 0.46.0 MHz (typical) CPU clock divider circuit (by 4, 8, or 64)
DTMF Generator · 16 dual-tone frequencies for tone dialing
8-Bit Basic Timer · · Programmable interval timer Watchdog timer Instruction Execution Times · · · 0.95, 1.91, and 15.3 µs at 4.19 MHz 1.12, 2.23, 17.88 µs at 3.58 MHz 0.67, 1.33, 10.7 µs at 6.0 MHz
Two 8-Bit Timer/Counters · · · Programmable 8-bit timer External event counter function Arbitrary clock frequency output
Operating Temperature · 40 °C to 85 °C
Watch Timer · · Real-time and time interval generation Four frequency outputs to the BUZ pin
Operating Voltage Range · 1.8 V to 5.5 V
Package Types · · 42 SDIP, 44 QFP (KS57C5204/C5208) 30 SDIP, 32 SOP (KS57C5304/C5308/C5312)
Bit Sequential Carrier · Supports 16-bit serial data transfer in arbitrary
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KS57C5204/C5208/P5208/C5304/C5308/P5308/C5312/P5312PRODUCT OVERVIEW
BLOCK DIAGRAM
INT0, INT1, INT2, INT4 8-Bit Timer/ Counter 0 8-Bit Timer/ Counter 1 P6.0-P6.3/ KS0-KS3 P7.0-P7.3/ KS4-KS7 P8.0 - P8.3 P9.0 - P9.2 I/O Port 6 I/O Port 7
RESET
XIN
XOUT W atchdog Timer
Interrupt Control Block
Clock
Stack Pointer
Basic Timer W atch Timer Input Port 1 P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT4 P2.0/TCLO0 P2.1/TCLO1 P2.2/CLO P2.3/BUZ P3.0/TCL0 P3.1/TCL1 P3.2 P3.3 P4.0/BTCO P4.1-4.3 P5.0-P5.3
Internal Interrupts Instruction Decoder Arithmetic and Logic Unit
Program Counter
Program Status Word I/O Port 2 Flags I/O Port 3
I/O Port 8 I/O Port 9
I/O Port 4 768x4-Bit Data Memory Program Memory KS57C5204/C5304: 4KBytes KS57C5208/C5308: 8KBytes KS57C5312: 12KBytes I/O Port 5 DTMF Generator
DTMF
NOTE:
KS57C5304/C5308/C5312 does not use P1.1/INT1, P1.2/INT2, P1.3/INT4, P3.2, P3.3, INT1, INT2, INT4, P8.0-P8.3, and P9.0-P9.2.
Figure 1-1. KS57C5204/C5208/C5304/C5308/C5312 Simplified Block Diagram
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Others parts begin by ks
KS-1 KS-2 KS-3 KS-4 KS-5 KS-6 KS-7 KS-8
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