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Details, datasheet, quote on part number:KS57C5404
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| Part: | KS57C5404 |
| Category: | Microcontrollers |
| Description: | The Ks57c5404 Single-chip CMOS Microcontroller is Designed For High-performance Using Samsungs Newest 4-bit Cpu Core, Sam47 ( Samsung Arrangeable Micro |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KS57C5404 datasheet File size : 234 kB |
| Request For quote: | Find where to buy KS57C5404
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Datasheet text preview:
KS57C5404/P5404
PRODUCT OVERVIEW
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PRODUCT OVERVIEW
OVERVIEW
The KS57C5404 single-chip CMOS microcontroller is designed for high-performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). With a versatile 8-bit timer/counter and a D/A converter, the KS57C5404 offers an excellent design solution for a wide variety of telecommunication applications. Up to 17 pins of the 24-pin SDIP package can be dedicated to I/O. Four vectored interrupts provide fast response to internal and external events. In addition, the KS57C5404's advanced CMOS technology has realized substantially lower power consumption with a wide operating voltage range -- all at a substantially lower cost.
OTP
The KS57C5404 microcontroller is also available in OTP (One Time Programmable) version, KS57P5404. KS57P5404 microcontroller has an on-chip 4-Kbyte one-time-programmable EPROM instead of masked ROM. The KS57P5404 is comparable to KS57C5404, both in function and in pin configuration.
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PRODUCT OVERVIEW
K S 5 7 C 5404/P5404
FEATURES SUMMARY
Memory · · 512 × 4-bit RAM 4096 × 8-bit ROM Bit Sequential Carrier · Supports 16-bit serial data transfer in arbitrary format
I/O Pins · 17 pins I/O · N-channel open-drain I/O: 8 pins 8-Bit Basic Timer · · Programmable interval timer Watchdog timer
Power-Down Modes · · Idle mode (only CPU clock stops) Stop mode (system clock stops)
Oscillation Sources · · · Crystal, or ceramic for system clock Crystal, ceramic: 0.46.0 MHz CPU clock divider circuit (by 4, 8, or 64)
Interval 8-Bit Timer/Counter · · · Programmable interval timer External event counter function Timer/counter clock output to TCLO0 pin Instruction Execution Times · · 0.95, 1.91, and 15.3 µs at 4.19 MHz 0.67, 1.33, 10.7 µs at 6.0 MHz
Buzzer Output · Four frequency output to BUZ pin
Operating Temperature · 40 °C to 85 °C
D/A Converter · 8-bit D/A converter
Operating Voltage Range · · 1.8 V to 5.5 V (at 3 MHz) 2.7 V to 5.5 V (at 6 MHz)
Interrupts · · · Two external interrupt vectors Two internal interrupt vectors One quasi-interrupt Package Types · · 24-pin SOP-375 24-pin SDIP-300
Memory-Mapped I/O Structure · Data memory bank 15
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KS57C5404/P5404
PRODUCT OVERVIEW
BLOCK DIAGRAM
W atchdog Timer INT0, INT1 8-bit Timer/ Counter
RESET
XIN
XOUT Basic Timer
Interrupt Control Block
Clock
Stack Pointer Buzzer Program Counter I/O Port 0 Program Status W ord P0.0/INT0 P0.1/INT1 P0.2/KS0 P0.3/KS1 P1.0/TCL0 P1.1/TCLO0 P1.2/CLO P1.3/BUZ P2.0
DAO
D/A Converter Internal Interrupts
P4.0P4.3 P5.0P5.3
I/O Port 4 Instruction Decoder I/O Port 5 Arithmetic Logic Unit
I/O Port 1
Flags I/O Port 2
512 x 4-bit Data Memory
4 K byte Program Memory
Figure 1-1. KS57C5404 Simplified Block Diagram
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