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Part: KS57C5532

Category:
 Microcontrollers

Description: The Ks57c5532/p5532 Single-chip CMOS Microcontroller Has Been Designed For High-performance Using Samsungs Newest 4-bit Cpu Core, Sam47 ( Samsung Arran

Company: Samsung Semiconductor, Inc.

Datasheet: Download KS57C5532 datasheet     File size : 256 kB

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Datasheet text preview:
KS57C5532/P5532
PRODUCT OVERVIEW
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PRODUCT OVERVIEW
OVERVIEW
The KS57C5532/P5532 single-chip CMOS microcontroller has been designed for high-performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). The KS57P5532 is a microcontroller which has 32-kbyte one-time-programmable EPROM but its functions are same to KS57C5532. With its DTMF generator, 8-bit serial I/O interface, and versatile 8-bit timer/counters, the KS57C5532/P5532 offers an excellent design solution for a wide variety of telecommunication applications. Up to 55 pins of the 64-pin SDIP or QFP package can be dedicated to I/O. Seven vectored interrupts provide fast response to internal and external events. In addition, the KS57C5532/P5532's advanced CMOS technology provides for low power consumption and a wide operating voltage range.
DEVELOPMENT SUPPORT
The Samsung Microcontroller Development System, SMDS, provides you with a complete PC-based development environment for KS57-series microcontrollers that is powerful, reliable, and portable. In addition to its window-based program development structure, the SMDS toolset includes versatile debugging, trace, instruction timing, and performance measurement applications. The Samsung Generalized Assembler (SAMA) has been designed specifically for the SMDS environment and accepts assembly language sources in a variety of microprocessor formats. SAMA generates industry-standard hex files that also contain program control data for SMDS compatibility.
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PRODUCT OVERVIEW
KS57C5532/P5532
FEATURES SUMMARY
Memory · · 1 K × 4-bit RAM 32 K × 8-bit ROM Bit Sequential Carrier · Supports 8-bit serial data transfer in arbitrary format
55 I/O Pins · · · Input only: 4 pins I/O: 43 pins N-channel open-drain I/O (S/W): 8 pins
Interrupts · · · 3 external interrupt vectors 4 internal interrupt vectors 2 quasi-interrupts
Memory-Mapped I/O Structure · Data memory bank 15
Power-Down Modes · · · Idle: Only CPU clock stops Stop: Main system clock stops Subsystem clock stop mode
DTMF Generator · 16 dual-tone frequencies for tone dialing
Oscillation Sources 8-bit Basic Timer · · Programmable internal timer Watchdog timer · · · · · Crystal, ceramic for main system clock Crystal oscillator for subsystem clock Main system clock frequency: 3.579545 MHz (typical) Subsystem clock frequency: 32.768 kHz (typical) CPU clock divider circuit (by 4, 8, or 64)
Two 8-bit Timer/Counters · · · · · Programmable interval timer External event counter function Timer/counters clock outputs to TCLO0 and TCLO1 pins External clock signal divider Serial I/O interface clock generator
Instruction Execution Times · · · 0.67, 1.33, 10.7 µs at 6.0 MHz 1.12, 2.23, 17.88 µs at 3.579545 MHz 122 µs at 32.768 kHz
Watch Timer · · Time interval generation: 0.5 s, 3.9 ms at 32.768 kHz 4 frequency outputs to the BUZ pin
Operating Temperature · ­ 40 °C to 85 °C
Operating Voltage Range · · 1.8 V to 5.5 V (at 3 MHz) 2.7 V to 5.5 V (at 6 MHz)
8-bit Serial I/O Interface · · · 8-bit transmit/receive mode 8-bit receive mode LSB-first or MSB-first transmission selectable
Package Types · 64 SDIP, 64 QFP
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KS57C5532/P5532
PRODUCT OVERVIEW
BLOCK DIAGRAM
XIN
INT0, INT1, INT2 INT4
RESET
XOUT
Watch Timer
Basic Timer
Watch-Dog Timer
P0.0/SCK P0.1/SO P0.2/SI P0.3/BTCO
XTIN XTOUT I/O Port 0
8-BIT Timer/ Counter 0 8-BIT Timer/ Counter 1
P6.0-P6.3/ KS0-KS3 P7.0-P7.3/ KS4-KS7 P8.0-P8.3 P9.0-P9.3 P10.0-P10.3 P11.0-P11.3 P12.0-P12.3 P13.0-P13.2
Interrupt Control Block
Clock
Stack Pointer Serial I/O Port Program Counter
P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT4 P2.0/TCLO0 P2.1/TCLO1 P2.2/CLO P2.3/BUZ P3.0/TCLO0 P3.1/TCLO1 P3.2 P3.3 P4.0-P4.3 P5.0-P5.3
I/O Port 6 I/O Port 7 I/O Port 8 I/O Port 9 I/O Port 10 I/O Port 11 I/O Port 12 I/O Port 13
Internal Interrupts
Input Port1
Instruction Decoder
Program Status Word
I/O Port 2
Arithmetic and Logic Unit
I/O Port 3 Flags I/O Port 4 I/O Port 5
1 K x 4-BIT Data Memory
32 K Byte Program Memory
DTMF Generator
DTMF
Figure 1-1. KS57C5532/P5532 Simplified Block Diagram
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