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Details, datasheet, quote on part number:KS88C2064
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| Part: | KS88C2064 |
| Category: | Microcontrollers => 8 bit => S3C8(KS88) Series |
| Description: | Description = KS88C2064 Single-chip CMOS Microcontroller ;; ROM(KB) = 64 ;; RAM(bytes) = - ;; I/o Pins = 32 ;; Interrupt (Int/Ext) = 6/8 ;; Timer/counters = BT/WDT/WT/8T/16T ;; Serial Interface = - ;; LCD (Seg/Com) = 65/18 ;; ADC (BitxCh) = - ;; PWM(BitxCh) = (8x1) ;; Max. OSC.Freq. (MHz) = 4 ;; VDD(V) = 2.2~3.4 ;; Other Features = Font ROM(192KB),RC Osc.,subsystem Clock,buzzer Output,voltage Doubler ;; Package = 128QFP ;; Production Status = Eol |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KS88C2064 datasheet File size : 160 kB |
| Request For quote: | Find where to buy KS88C2064
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Datasheet text preview:
KS88C2064
PRODUCT OVERVIEW
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PRODUCT OVERVIEW
KS88-SERIES MICROCONTROLLERS
Samsung's KS88 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: -- Efficient register-oriented architecture -- Selectable CPU clock sources -- Idle and Stop power-down mode release by interrupt -- Built-in basic timer with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels.
KS88C2064 MICROCONTROLLER
The KS88C2064 single-chip CMOS microcontroller is fabricated using a highly advanced CMOS process and is based on Samsung's newest CPU architecture. The KS88C2064 is the microcontroller which has 64-Kbyte mask-programmable ROM and 192-Kbyte mask ROM for font data. Using a proven modular design approach, Samsung engineers developed the KS88C2064 by integrating the following peripheral modules with the powerful SAM87 core: -- Four programmable I/O ports, excluding one BUZ pin, for a total of 32 pins. -- Eight bit-programmable pins for external interrupts. -- One 8-bit basic timer for oscillation stabilization and watchdog functions (system reset). -- One 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes. -- Watch timer for real time. The KS88C2064 is a versatile microcontroller for data bank or dictionary. It is currently available in a 128-pin QFP package.
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PRODUCT OVERVIEW
K S 88C2064
FEATURES
CPU · SAM87 CPU core LCD Controller/Driver · · · · 65 segments and 18 common terminals Internal resistor circuit for LCD bias Voltage doubler All dot can be switched on/off
Memory · · · · 64-Kbyte internal program memory (ROM) 192-Kbyte internal memory (ROM) for font data 272-byte internal register file (Excluding LCD RAM) 6144-byte data RAM
Timers and Timer/Counters · One programmable 8-bit basic timer (BT) for oscillation stabilization control or watchdog timer (software reset) function One 8-bit timer/counter (Timer 0) with three operating modes; Interval, Capture and PWM One 16-bit timer/counter (Timer 1) with two 8bit timer/counter modes; Interval
Instruction Set · · 78 instructions IDLE and STOP instructions added for power-down modes
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Instruction Execution Time · · 1.5 µs at 4 MHz fx (minimum) 183 µs at 32,768 Hz fxt
Power-Down Modes · · Idle mode (CPU clock stops) Stop mode (main oscillation and CPU clock stops)
Interrupts · · · Five interrupt levels and 15 interrupt sources 15 vectors (15 sources have a dedicated vector address) Fast interrupt processing feature (for one selected interrupt level) Operating Temperature Range · 40 °C to + 85 °C
Operating Voltage Range · · 2.2 V to 4.5 V at 1 MHz fx 2.7 V to 4.5 V at 4 MHz fx
I/O Ports · · · Four 8-bit I/O ports (P0P3) for a total of 32-bit programmable pins Eight input pins for external interrupts One output only pin for BUZ
Package Type · 128-pin QFP
Watch Timer · · · Interval time: 3.91 ms, 1s at 32,768 Hz Four frequency outputs to BUZ pin and BUZ pin Clock source generation for LCD
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KS88C2064
PRODUCT OVERVIEW
BLOCK DIAGRAM
P0.0-P0.7 (A8-A15)
P1.0-P1.7 (AD0-AD7)
RESET
Port 0
Port 1
TEST P2.0-P2.3 (AS, DW, DR, DM ) P2.4-P2.7 (T0, T0CK, CLO, BUZ) P3.0/TB/INT0 P3.1/TA/INT1 P3.2/T1CK/INT2 P3.3/INT3 P3.4/INT4 P3.5/INT5 P3.6/INT6 P3.7/INT7 COM0-COM8 COM9-COM17 SEG0-SEG64 VLC0 BIAS CA CB TA TB T1CK
Basic Timer
Internal Bus Port 2
XIN XOUT
I/O Port and Interrupt Control Main OSC Port 3
XTIN XTOUT
Sub OSC
SAM8 CPU LCD Driver/ Controller 64-Kbyte ROM 314-Byte Register File Voltage Doubler
BUZ
BUZ
Watch Timer
T0
Timer 0
T0CK
Timer 1
192-Kbyte Font ROM
6144-Byte Data RAM
Figure 1-1. Block Diagram
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