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Details, datasheet, quote on part number:KT3170
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| Part: | KT3170 |
| Category: | Communication => Telephony => DTMF (Dual Tone Multiple Frequency) |
| Description: | Low Power DTMF Receiver |
| Company: | Samsung Semiconductor, Inc. |
| Datasheet: | Download KT3170 datasheet File size : 120 kB |
| Request For quote: | Find where to buy KT3170
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Datasheet text preview:
KT3170
INTRODUCTION
The KT3170 is a complete Dual Tone Multiple Frequency (DTMF) receiver that is fabricated by low power CMOS and the Switched-Capacitor Filter technology. This LSI consists of band split filters, which seperates counting section which verifies the frequency and duration of the received tones before passing the corresponding code to the output bus. It decodes all 16 DTMF tone pairs into a 4bits digital code. The externally required components are minimized by on chip provision of a differential input AMP, clock oscillator and latched three state interface. The on chip clock generator requires only a low cost TV cystal as an external component.
LOW POWER DTMF RECEIVER
18-DIP-300A
FEATURES
· · · · · · Detects all 16 standard tones. Low power consumption : 15mW (Typ) Single power supply : 5V Uses inexpensive 3.58MHz crystal Three state outputs for microprocessor interface Good quality and performance for using in exchange system · Power down mode/input inhibit
ORDERING INFORMATION
Device KT3170N Package 18-DIP-300A Operating - 25°C ~ + 75°C
APPLICATIONS
· · · · · · · · · · PABX Central Office Paging Systems Remote Control Credit Card Systems Key Phone System Answering Phone Home Automation System Mobile Radio Remote Data Entry
PIN CONFIGURATION
IN+
1 2 3 4 5 6 7 8 9 KT3170
18 17 16 15 14 13 12 11 10
VDD
IN-
SI/GTO
GS
ESO
VR E F
DSO
II N PD N
Q4
Q3
OSC1
Q2
OSC2 GND
Q1 OE
Fig. 1
KT3170
PIN DESCRIPTION
Pin No 1 2 3 4 5 Symbol IN + IN GS VREF IIN
LOW POWER DTMF RECEIVER
Description Non inverting input of the op amp. Inverting input of the op amp. Gain Select. The output used for gain adjustment of analog input signal with a feedback resistor. Reference Voltage output (VDD/2, Typ) can be used to bias the op amp input of VDD/2. Input inhibit. High input states inhibits the detection of tones. This pin is pulled down internally. Control input for the stand-by power down mode. Power down occurs when the signal on this input is in high states. This pin is pulled down internally. Clock input/output. A inexpensive 3.579545MHz crystal connected between these pins completes internal oscillator. Also, external clock can be used. Ground pin. Output Enable input. Outputs Q1-Q4 are CMOS push pull when OE is High and open circuited (High impedance) when disabled by pulling OE low. Internal pull up resistor built in. Three state data output. When enabled by OE, these digital outputs
6
PDN
7, 8 9 10
OSC1 OSC2 GND OE
11 - 14
Q1 - Q4
provide the hexadecimal code corresponding to the last valid tone pair received. Delayed Steering Output. Indicates that valid frequencies have been present for the required guard time, thus constituting a valid signal.
15
DSO
Presents a logic high when a received tone pair has been registered and the output latch is updated. Returns to logic low when the voltage on SI/GTO falls below VTH. Early Steering Outputs. Indicates detection of valid tone output a logic high immediately when the digital algorithm detects a recognizable tone pair. Any momentary loss of signal condition will cause ESO to return to low. Steering Input/Guard Time Output. A voltage greater the VTS detected at SI causes the device to register the detected tone pair
16
ESO
17
SI/GTO
and update the output latch. A voltage less than VTS frees the device to accept a new tone pair. The GTO output acts to reset the external steering time constant, and its state is a function of ESO and the voltage on SI
18
VDD
Power Supply (+5V, Typ)
KT3170
ABSOLUTE MAXIMUM RATINGS
Characteristics Power Supper Voltage Analog Input Voltage Range Digital Input Voltage Range Output Voltage Range Current On Any Pin Operating Temperature Storage Temperature Symbol VDD VI (A) VI (D) VO II T OPR T STG
LOW POWER DTMF RECEIVER
Value 6 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 10 - 40 ~ + 85 -60 ~ + 150
Unit V V V V mA °C °C
ELECTRICAL CHARACTERISTICS
Characteristic Operating Voltage Operating Current Power Dissipation Input Voltage Low Input Voltage High Input Leakage Current Pull Up Current On OE Pin Analog Input Impedance Steering Input Threshold Voltage Output Voltage Low Output Current Output Current VREF Output Voltage VREF Output Resistance Analog Input Offset Voltage Power Supply Rejection Ratio Common Mode Rejection Ratio Open Loop Voltage Gain Open Loop Unit Gain Bandwidth Analog Output Voltage Swing Acceptable Capacitive Load Acceptable Resistive Load Analog Input Common Mode Voltage Range
(VDD = 5V, Ta = 25°C, unless otherwise noted) Test Conditions VIN = GND or VDD OE = GND fIN = 1KHz No Load No Load VOL = 0.4V VOH = 4.6V Gain Setting Amp at 1KHz - 3.0V < VIN < 3.0V Gain Setting Amp at 1KHz RL = 100K GS GS No Load Min 4.75 3.5 8 2.2 4.97 1 0.4 2.4 Typ 3.0 15 0.1 7.5 10 2.5 0.8 10 25 60 60 65 1.5 4.5 100 50 3.0 2.8 Max 5.25 9.0 45 1.5 15 2.5 0.03 Unit V mA mW V V µA µA M V V V mA mA V K mV dB dB dB MHz VP-P pF K VP-P
Symbol VDD IDD PD VIL VIH II (LKG) IPU RI VTH VOL VOH IO (SINK) IO (SOURCE) VO (REF) RO (REF) VIO PSRR CMRR GV BW VO (P-P) CL RL VCM
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