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Part: M381L6423FTM-CLA2
Category:
Memory
-> DRAM
-> DDR SDRAM
-> Modules
-> Unbuffered DIMM
Description: Description = M381L6423FTM 184pin Unbuffered Module Based on 256Mb F-die With 64/72-bit Non Ecc ;; Density(MB) = 512 ;; Organization = 64Mx72 ;; Bank/ Interface = 4B/SSTL2 ;; Refresh = 8K/64ms ;; Speed = CC,C4,B3,AA,A2,B0 ;; #of Pin = 184 ;; Power = C,l ;; Component Composition = (32Mx8)x18 ;; Production Status = Mass Production ;; Comments = DDR266/333,DDR400
Company: Samsung Semiconductor, Inc.
Datasheet: Download M381L6423FTM-CLA2 datasheet File size : 680 kB
Request For quote: Find where to buy M381L6423FTM-CLA2
Datasheet text preview:
256MB, 512MB Unbuffered DIMM
DDR SDRAM
DDR SDRAM Unbuffered Module
184pin Unbuffered Module based on 256Mb F-die with 64/72-bit Non-ECC / ECC
Revision 1.1 August. 2003
Rev. 1.1 August, 2003
256MB, 512MB Unbuffered DIMM
Revision History
Revision 1.0 (August, 2003) - First release Revision 1.1 (August, 2003) - Added K4H560838F based Module.
DDR SDRAM
Rev. 1.1 August, 2003
256MB, 512MB Unbuffered DIMM
184Pin Unbuffered DIMM based on 256Mb F-die (x8, x16)
Ordering Information
Part Number M368L1624FTM-C(L)B3/AA/A2/B0 M368L3223FTN-C(L)B3/AA/A2/B0 M381L3223FTM-C(L)B3/AA/A2/B0 M368L6423FTN-C(L)B3/AA/A2/B0 M381L6423FTM-C(L)B3/AA/A2/B0 D ensity 128MB 256MB 256MB 512MB 512MB Organization 16M x 64 32M x 64 32M x 72 64M x 64 64M x 72
DDR SDRAM
Component Composition 16Mx16 (K4H561638F) * 4EA 32Mx8 (K4H560838F) * 8EA 32Mx8 (K4H560838F) * 9EA 32Mx8 (K4H560838F) * 16EA 32Mx8 (K4H560838F) * 18EA
Height 1,250mil 1,250mil 1,250mil 1,250mil 1,250mil
Operating Frequencies
B3(DDR333@CL=2.5) Speed @CL2 Speed @CL2.5 CL-tRCD-tRP 133MHz 166MHz 2 .5-3-3 AA(DDR266@CL=2) 133MHz 133MHz 2-2-2 A2(DDR266@CL=2) 133MHz 133MHz 2 -3-3 B0(DDR266@CL=2.5) 100MHz 133MHz 2.5-3-3
Feature
· Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V
· Double-data-rate architecture; two data transfers per clock cycle
· Bidirectional data strobe(DQS) · Differential clock inputs(CK and CK) · DLL aligns DQ and DQS transition with CK transition · Programmable Read latency 2, 2.5 (clock) · Programmable Burst length (2, 4, 8) · Programmable Burst type (sequential & interleave) · Edge aligned data output, center aligned data input · Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh) · Serial presence detect with EEPROM · PCB : Height 1,250 (mil), single (128MB, 256MB), double (512MB) sided
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Rev. 1.1 August, 2003
Others parts begin by m3
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