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Details, datasheet, quote on part number:S5F333SZ03
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Datasheet text preview:
1/3 INCH CCD IMAGE SENSOR FOR VGA COMPATIBILITY
S5F333SZ03
INTRODUCTION
The S5F333SZ03 is an interline transfer progressive scan type square pixel CCD area image sensor of 1/3 inch optical format developed for VGA. The electron accumulation time can be changed by the electronic shutter function and it is possible to obtain a frame still image without a mechanical shutter. High resolution and good color reproduction are accomplished by using mosaic R, G, B primary color filters. It is suitable for still cameras and PC input cameras.
16Pin Cer - DIP
FEATURES
· · · · · · · · · · · 330K Pixel Progressive-scan CCD High Vertical Resolution (480 TV lines) Square Unit Pixel for VGA Format No Substrate Voltage Adjustment No DC bias on Reset Clock R, G, B Mosaic On-Chip Color Filter Optical Size 1/3 inch Format Variable Speed Electronic Shutter Low Smear High Antiblooming Horizontal Register 5V Drive
ORDERING INFORMATION
Device S5F333SZ03-LBB0 Package 16Pin Cer - DIP Operating -10 °C - +60 °C
STRUCTURE
· · · · · Number of Total Pixels: Number of Effective Pixels: Chip Size: Unit Pixel Size: Optical Blacks & Dummies: 692(H) × 504(V) 659(H) × 494(V) 6.00mm(H) × 4.95mm(V) 7.40 µm(H) × 7.40 µm(V) Refer to Figure Below
16 2
659
31 2 Dummy Pixels
Eff ective Imaging Area (Top view) V-CC D OUTPUT 49 4 8 5 Optical Black Pixels
Eff ective Pixels
H-CCD
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S5F333SZ03
1/3 INCH CCD IMAGE SENSOR FOR VGA COMPATIBILITY
BLOCK DIAGRAM
(Top View)
8 V OUT
7 GND
6 NC
5 GND
4 NC
V1
3
V2
2
V3
1
Vertical Shift Register CCD
Vertical Shift Register CCD
Vertical Shift Register CCD
Vertical Shift Register CCD
G R G G R G R
B G B B G B G
G R G G R G R
B G B B G B G
Horizontal Shift Register CCD
to substrate
9 V DD
10 NC
11 GND
SUB
12
13 VL
RS
14
H1
15
H2
16
Figure 1. Block Diagram
PIN DESCRIPTION
Table 1. Pin Description Pin 1 2 3 4 5 6 7 8 Symbol V3 V2 V1 NC GND NC GND V OUT Description Vertical CCD transfer clock 3 Vertical CCD transfer clock 2 Vertical CCD transfer clock 1 No connection Ground No connection Ground Signal output Pin 9 10 11 12 13 14 15 16 Symbol V DD NC GND SUB VL RS H1 H2 Description Output stage drain bias No connection Ground Substrate clock Protection circuit bias Reset gate clock Horizontal CCD transfer Horizontal CCD transfer
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1/3 INCH CCD IMAGE SENSOR FOR VGA COMPATIBILITY
S5F333SZ03
ABSOLUTE MAXIMUM RATINGS (1)
Table 2. Absolute Maximum Ratings Characteristics Substrate clock voltage Symbols SUB - GND SUB - V D D SUB - V O U T Supply voltage Vertical clock input voltage VDD, VOUT - GND V1 - V L V2, V3 - VL V1 - SUB V2, V 3 - S U B Horizontal clock input voltage H1, H2 - GND H1, H2 - VL H1, H2 - SUB Output clock input voltage RS - V L RS - S U B RS - GND Protection circuit bias voltage SUB - V L GND - VL Operating temperature Storage temperature TOP TSTG Min. -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -40 -40 -0.3 -0.3 -40 -0.3 -40 -0.3 -16 -0.3 -10 -30 Max. 40 40 40 17 17 32 17 (2) 32 17 17 substrate DC bias (3) 17 substrate DC bias (2) 17 (2) 40 17 60 80 Unit V V V V V V V V V V V V V V V V °C °C
NOTE: 1. The device can be destroyed, if the applied voltage or temperature is higher than the absolute maximum rating voltage or temperature. 2. VDD bias must be operated before reset pulse operation. 3. Substrate DC bias(OFD bias) must be operated before horizontal, reset pulse operation.
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