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Part: LA4805V

Category:

Description: 3 V Stereo Headphone Power Amplifier

Company: Sanyo Semiconductor Corporation

Datasheet: Download LA4805V datasheet     File size : 355 kB

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Datasheet text preview:
Ordering number : EN4469A
Monolithic Linear IC
LA4805V
3 V Stereo Headphone Power Amplifier
Overview
The LA4805V is a power IC developed for use in stereo headphones. It includes low frequency enhancement, beep function and output control circuits on-chip. Furthermore, t h e LA4805V realizes a high S/N ratio, a high ripple exclusion ratio, and low current drain.
Package Dimensions
unit: mm 3191-SSOP30
[LA4805V]
Functions
· · · · · · Stereo headphone power amplifier Low frequency enhancement (L.BOOST) Beep amplifier Output suppression circuit (PVSS) Power switch Muting switch
Features
· · · · · Low current drain (8.3 mA typical) High S/N ratio (90 dB typical, 13 µV) High ripple exclusion ratio (75 dB typical) No output electrolytic capacitors required Ultra-miniature package (SSOP-30)
SANYO: SSOP30
Specifications
Maximum Ratings at Ta = 25°C
Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Conditions Ratings 4.5 500 ­15 to +50 ­40 to +150 Unit V mW °C °C
Operating Conditions at Ta = 25°C
Parameter Recommended supply voltage Recommended load resistance Operating supply voltage range Symbol VCC RL VCC op Conditions Ratings 3.0 16 to 32 1.8 to 3.6 Unit V V
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
O3098HA (OT)/40794TH B8-0242 No. 4469-1/17
LA4805V
Operating Characteristics at Ta = 25°C, VCC = 3.0 V, f = 1 kHz, 0.775 V = 0 dBm, RL = 10 k (L.B), RL = 16 (PWR)
Ratings Parameter [L.BOOST +PVSS + PWR] ICCO1 Quiescent current ICCO2 ICCO3 ICCO4 [PWR AMP] Output power Voltage gain Channel balance Total harmonic distortion Output noise voltage Crosstalk Ripple exclusion ratio Muting attenuation Beep output Output current offset Input resistance [L.BOOST] Voltage gain Boost* Maximum output voltage Total harmonic distortion Crosstalk Output noise voltage Ripple exclusion ratio [L.BOOST + PWR] Voltage gain Output voltage Total harmonic distortion Crosstalk VG3 VO1 THD3 CT3 VIN = ­30 dBm, f = 1 kHz, boost on/off VIN = ­30 dBm, f = 100 Hz, boost on VIN = ­30 dBm, f = 100 Hz, boost on VO = ­20 dBm, RV = 0 , boost on VIN = ­30 dBm, PVSS2 The input amplitude when the output is +3 dB over the starting point VIN = ­40 dBm, PVSS2 PVSS2 ­41 25 8 0.13 10 0.23 0.14 32.5 12 0.33 0.5 dB V % dB VG2 L.BTS1 L.BTS2 VO max THD2 CT2 VNO2 SVRR2 VIN = ­30 dBm, boost on/off VIN = ­30 dBm, f = 100 Hz, boost on VIN = ­30 dBm, f = 10 kHz, boost on THD = 1%, boost on VO = 0.1 V, boost on VO = ­20 dBm, Rg = 0, boost on Rg = 0, boost off Rg = 0, f = 100 Hz, Vg = ­20 dBm, boost on 50 25 ­3.2 13 3 0.2 ­5.2 15 5 0.4 0.085 30 3 60 10 ­7.2 17 7 0.6 0.25 dB dB dB V % dB µV dB PO VG1 VBL THD1 VNO1 CT1 SVRR1 ATTM VO BEEP VDC OFF Ri THD = 10% VO = ­10 dBm VO = ­10 dBm VO = 0.35 V Rg= 0, DIN AUDIO VO = ­10 dBm, TUN = 1 kHz, Rg = 0 VCC = 1.8 V, f = 100 Hz, VR = ­20 dBm, TUN = 100 Hz THD = 1%, Rg = 0 k VIN = ­16 dBm (sine wave) VIN = 0 V, Rg = 0 35 60 80 1.0 ­20 7 15 15.7 ­1 25 17.7 0 0.1 13 45 75 90 3.0 0 10 20 13 19.7 1 0.3 25 mW dB dB % µV dB dB dB mV mV k IC off Muting on Rg = 0, L.BST/PVSS off Rg = 0, L.BST/PVSS on 1.0 4.0 4.5 0.05 2.7 8.3 8.6 1.0 5.0 12.0 12.5 µA mA mA mA Symbol Conditions min typ max Unit
[L.BOOST + PVSS + PWR]: When VO1 is maximum PVSS voltage PVSS width PVSS distortion PVSS starting input Note: * Boost levels relative to 1 kHz VO PVSS2 VO PVSS W THD PVSS VIN PVSS ­32.5 25 ­37.5 30 0.55 ­46 ­42.5 35 2.0 ­51 dBm dB % dBm
No. 4469-2/17
LA4805V
Pin Assignment and Block Diagram
No. 4469-3/17


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