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Part: LC75852E
Category:
Interface and Interconnect
Description: Asynchronous Silicon Gate 1/2 Duty LCD Driver With On-chip Key Input Function
Company: Sanyo Semiconductor Corporation
Datasheet: Download LC75852E datasheet File size : 426 kB
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Datasheet text preview:
Ordering number : EN4828A
CMOS LSI
LC75852E, 75852W
Asynchronous Silicon Gate 1/2 Duty LCD Driver with On-Chip Key Input Function
Overview
The LC75852E and LC75852W are 1/2 duty dynamic LCD display drivers. In addition to being able to directly drive LCD panels with up to 90 segments, they can also control up to four general-purpose output ports. These products also include a key scan circuit which allows them to accept input from keypads with up to 30 keys. T h i s allows end product front panel wiring to be simplified.
Package Dimensions
unit: mm 3159-QFP64E
[LC75852E]
Features
· Up to 30 key inputs (Key scan is only performed when a key is pressed.) · 1/2 duty 1/2 bias (up to 90 segments) · Sleep mode and the all segments off function can be controlled from serial data. · Segment output port/general-purpose output port usage can be controlled from serial data. · Serial data I/O supports CCB format communication with the system controller. · High generality since display data is displayed directly without decoder intervention · Reset pin that can establish the initial state.
SANYO: QIP64E
unit: mm 3190-SQFP64
[LC75852W]
· CCB is a trademark of SANYO ELECTRIC CO., LTD. · CCB is SANYO's original bus format and all the bus addresses are controlled by SANYO.
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter Maximum supply voltage Input voltage Output voltage Symbol VDD max VIN VOUT IOUT1 Output current IOUT2 IOUT3 Allowable power dissipation Operating temperature Storage temperature Pd max Topr Tstg VDD OSC, CE, CL, DI, RES, KI1 to KI5 OSC, DO, S1 to S45, COM1, COM2, KS1 to KS6, P1 to P4 S1 to S45 COM1, COM2, KS1 to KS6 P1 to P4 Ta = 85°C Conditions
SANYO: SQFP64
Ratings 0.3 to +7.0 0.3 to VDD + 0.3 0.3 to VDD + 0.3 100 1 5 200 40 to +85 55 to +125 Unit V V V µA mA mA mW °C °C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
63096HA (OT)/N1594TH (OT) B8-1326, 1328 No. 4828-1/16
LC75852E, 75852W Allowable Operating Ranges at Ta = 40 to +85°C, VSS = 0 V
Parameter Supply voltage Input high-level voltage Input low-level voltage Recommended external resistance Recommended external capacitance Guaranteed oscillator range Data setup time Data hold time CE wait time CE setup time CE hold time High-level clock pulse width Low-level clock pulse width Rise time Fall time DO output delay time DO rise time RES switching time Symbol VDD VIH1 VIH2 VIL ROSC COSC fOSC tds tdh tcp tcs tch tøH tøL tr tf tdc tdr t2 VDD CE, CL, DI, RES KI1 to KI5 CE, CL, DI, RES, KI1 to KI5 OSC OSC OSC CL, DI: Figure 1 CL, DI: Figure 1 CE, CL: Figure 1 CE, CL: Figure 1 CE, CL: Figure 1 CL: Figure 1 CL: Figure 1 CE, CL, DI: Figure 1 CE, CL, DI: Figure 1 DO, RPU = 4.7 k, CL = 10 pF*: Figure 1 DO, RPU = 4.7 k, CL = 10 pF*: Figure 1 Figure 2 10 25 160 160 160 160 160 160 160 160 160 1.5 1.5 Conditions min 4.5 0.8 VDD 0.6 VDD 0 62 680 50 100 typ max 6.0 VDD VDD 0.2 VDD Unit V V V V k pF kHz ns ns ns ns ns ns ns ns ns µs µs µs
Note: * Since DO is an open-drain output, these values differ depending on the pull-up resistor RPU and the load capacitance CL.
Electrical Characteristics in the Allowable Operating Ranges
Parameter Hysteresis Input high-level current Input low-level current Input floating voltage Pull-down resistance Output off leakage current Symbol VH IIH IIL VIF RPD IOFFH VOH1 Output high-level voltage VOH2 VOH3 VOH4 VOL1 VOL2 Output low-level voltage VOL3 VOL4 VOL5 Output middle-level voltage VMID1 VMID2 IDD1 IDD2 Conditions CE, CL, DI, RES, KI1 to KI5 CE, CL, DI, RES: VI = 6.0 V CE, CL, DI, RES: VI = 0 V KI1 to KI5 KI1 to KI5: VDD = 5.0 V DO: VO = 6.0 V KS1 to KS6: IO = 1 mA P1 to P4: IO = 1 mA S1 to S45: IO = 10 µA COM1, COM2: IO = 100 µA KS1 to KS6: IO = 50 µA P1 to P4: IO = 1 mA S1 to S45: IO = 10 µA COM1, COM2: IO = 100 µA DO: IO = 1 mA COM1, COM2: VDD = 6.0 V, IO = ±100 µA COM1, COM2: VDD = 4.5 V, IO = ±100 µA Sleep mode, Ta = 25°C VDD = 6.0 V, output open, Ta = 25°C, fOSC = 50 kHz 1.4 2.4 1.65 0.1 3.0 2.25 VDD 1.0 VDD 1.0 VDD 1.0 VDD 0.6 0.4 1.0 3.0 1.0 1.0 0.6 0.5 3.6 2.85 5 2.5 50 100 5.0 0.05 VDD 250 6.0 min typ 0.1 VDD 5.0 max Unit V µA µA V k µA V V V V V V V V V V V µA mA
Current drain
No. 4828-2/16
LC75852E, 75852W 1. When stopped with CL at the low level
2. When stopped with CL at the high level
Figure 1 Pin Assignment
No. 4828-3/16
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