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Part: LC876748C
Category:
Description: Automatic VFD Display Controller/driver (52 Outputs), 8-bit Synchronous Sio With 32-byte Automatic Transfer Function, 8-bit Asynchronous/synchronous Sio, 14-channel 8-bit A/D Converter, Tuner PWM Shared Output, Remote Control Receiver Circuit, Small-signal Detection Circuit, Medium Voltage (15 V) Ports, High--speed Multiplication And Division Instructions (24 X 16, 24/16, 16 X 8, 16/8)
Company: Sanyo Semiconductor Corporation
Datasheet: Download LC876748C datasheet File size : 440 kB
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Datasheet text preview:
Ordering number : ENN*7810
CMOS IC
LC876764C/56C/48C
8-Bit Single Chip Microcontroller with 64K/56K/48K-Byte ROM and 1536-Byte RAM on Chip
Preliminary Overview
The LC876764C / LC876756C / LC876748C are 8-bit single chip microcomputers with the following on-chip functional blocks: · CPU: operable at a minimum bus cycle time of 100ns · On-chip ROM maximum capacity: LC876764C 64K bytes LC876756C 56K bytes LC876748C 48K bytes · On-chip RAM: 1536 bytes · VFD automatic display controller / driver · 16 bit timer / counter (can be divided into two 8 bit timers) · 16 bit timer / counter (can be divided into two 8 bit timers / two 8 bit PWM) · Four 8 bit timer with prescaler · Timer for use as date / time clock · High speed clock counter · System clock divider function · Synchronous serial I/O port (with automatic block transmit / receive function) · Asynchronous / synchronous serial I/O port · 14-channel × 8-bit AD converter · Weak signal detector · 21-source 10-vectored interrupt system All of the above functions are fabricated on a single chip.
Package Dimensions
unit: mm 3151A [ LC876764C/56C/48C ]
Ver.1.03 D1002
22504 TN IM SK No.7810-1/20
LC876764C/56C/48C
Features
(1) Read Only Memory (ROM): LC876764C LC876756C LC876748C LC876764C/56C/48C 65536 × 8 bits 57344 × 8 bits 49152 × 8 bits 1536 × 9 bits
(2) Random Access Memory (RAM):
(3) Minimum Bus Cycle Time: 100ns (10MHz) Note: The bus cycle time indicates ROM read time. (4) Minimum Instruction Cycle Time: 300ns (10MHz) (5) Ports · Input / output ports Data direction programmable for each bit individually: 20 (P1n, P70 to P73, P8n) · 15V withstand input / output ports Data direction programmable in nibble units: 8 (P0n) (When N-channel open drain output is selected, data can be input in bit units.) Data direction programmable for each bit individually: 8 (P3n) · Input ports: 2 (XT1, XT2) · VFD output ports Large current outputs for digits: 9 (S0 / T0 to S8 / T8) Large current outputs for digits / segments: 7 (S9 / T9 to S15 / T15) Digit / segment outputs: 8 (S16 to S23) Segment outputs: 28 (S24 to S51) Other functions Input / output ports: 12 (PFn, PG0 to PG3) Input ports: 24 (PCn, PDn, PEn) · Oscillator pins: 2 (CF1, CF2) · Reset pin: 1 (RES#) · Power supply: 6 (VSS1 to 2, VDD1 to 4) (6) VFD automatic display controller · Programmable segment / digit output pattern Output can be switched between digit / segment waveform output (pins 9 to 24 can be used for output of digit waveforms.) Parallel-drive available for large current VFD · 16-step dimmer function available (7) Weak signal detection (MIC signals etc) · Counts pulses with width greater than a preset value · 2 bit counter (8) Timers · Timer 0: 16 bit timer / counter with capture register Mode 0: 2 channel 8-bit timer with programmable 8 bit prescaler and 8 bit capture register Mode 1: 8 bit timer with 8 bit programmable prescaler and 8 bit capture register + 8 bit counter with 8 bit capture register Mode 2: 16 bit timer with 8 bit programmable prescaler and 16 bit capture register Mode 3: 16 bit counter with 16 bit capture register · Timer 1: PWM / 16 bit timer / counter with toggle output Mode 0: 8 bit timer (with toggle output) + 8 bit timer / counter (with toggle output) Mode 1: 2 channel 8 bit PWM Mode 2: 16 bit timer / counter (with toggle output) Toggle output also possible using the lower order 8 bits Mode 3: 16 bit timer (with toggle output) The lower order 8 bits can be used as PWM output
No.7810-2/20
LC876764C/56C/48C · Timer 4: 8 bit timer with 6 bit prescaler · Timer 5: 8 bit timer with 6 bit prescaler · Timer 6: 8 bit timer with 6 bit prescaler · Timer 7: 8 bit timer with 6 bit prescaler · Base timer 1) The clock signal can be selected from any of the following: Sub-clock (32.768kHz crystal oscillator), system clock, and prescaler output from timer 0 2) Interrupts can be selected to occur at one of five different times (9) High speed clock counter · Capable of counting maximum: 20MHz clock (using main clock 10MHz) · Real time output (10) Serial interface · SIO 0: 8 bit synchronous serial interface 1) LSB first / MSB first function available 2) Internal 8 bit baud-rate generator (maximum transmit clock period 4 / 3 Tcyc) 3) Consecutive automatic data communication (1 to 256 bits) · SIO 1: 8 bit asynchronous / synchronous serial interface Mode 0: Synchronous 8 bit serial IO (2-wire or 3-wire, transmit clock 2 to 512 Tcyc) Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 8 to 2048 Tcyc) Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2 to 512 Tcyc) Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection) (11) AD converter · 8 bits × 14 channels (12) Remote control receiver circuit (connected to P73 / INT3 / T0IN terminal) · Noise rejection function (noise rejection filter time constant can selected from 1 / 32 / 128 Tcyc) (13) Watchdog timer · The watching timer period is set using an external RC · Watchdog timer can produce interrupt, system reset (14) Interrupts: 21-source, 10-vectored interrupts 1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or lower priority interrupt request is refused. 2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence. In the case of equal priority levels, the vector with the lowest address takes precedence.
No. 1 2 3 4 5 6 7 8 9 10 Vector 00003H 0000BH 00013H 0001BH 00023H 0002BH 00033H 0003BH 00043H 0004BH Selectable level X or L X or L H or L H or L H or L H or L H or L H or L H or L H or L INT0 INT1 INT2 / T0L / INT4 INT3 / Base timer / INT5 T0H T1L / T1H SIO0 SIO1 ADC / MIC / T6 / T7 VFD automatic display controller / Port 0 / T4 / T5 Interrupt signal
· Priority level: X > H > L · For equal priority levels, vector with lowest address takes precedence. (15) Subroutine stack levels: 768 levels max. Stack is located in RAM.
No.7810-3/20
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