|
|
Part: E692AHJ
Category:
Discrete
Description: 200 MHZ Monolithic Dual Pin Electronics Driver
Company: Semtech Corporation
Datasheet: Download E692AHJ datasheet File size : 143 kB
Request For quote: Find where to buy E692AHJ
Datasheet text preview:
Edge692 200 MHz Monolithic Dual Pin Electronics Driver
EDGE HIGH-PERFORMANCE PRODUCTS Description
T h e Edge692 is a dual pin electronics driver manufactured in a high-performance, complementary bipolar process. In Automatic Test Equipment (ATE) applications, the Edge692 offers two pin drivers suitable for drive-only channels in memory testers, as well as for bidirectional channels in memory, VLSI, and mixed- signal test systems. The Edge692 is designed to produce excellent waveforms (low overshoot), especially at low swings (<500 mV), and have extremely low leakage currents in HiZ mode. In addition, the Edge692 is pin and functionally compatible with both the Edge693 and the Bt692. Each driver is capable of forcing 9V signals over a 12V range, in addition to going into a high impedance state. The driver slew rate is adjustable between 2 V/ns and 1 V/ns. Each driver is completely isolated from the other. There are separate data, enable, slew rate adjust, high and low levels, as well as power supply inputs for each driver. Combining two independent drivers into a 28 pin PLCC package offers a highly integrated solution where speed and density are at a premium.
DRVENA DRVENA* DRIVER A DHIA
Applications
· · Memor y Test Equipment Instrumentation
Functional Block Diagram
SLEWADJA
Features
· · · · · · · · · · · 2 V/ns Driver Slew Rates Adjustable Driver Slew Rates Three Statable Low HiZ Leakage Low Voltage Driver Swings Low Overshoot Waveforms 12 V Output Range 9 V Output Swings 28-Pin PLCC with an Internal Heat Spreader Edge693 Compatible Bt692 Compatible
EN DHIA* DVHA DVLA BIAS DRVENB DRVENB* DRIVER B DHIB EN DHIB* DVHB DVLB
DOUTA
DOUTB
SLEWADJB
Revision 1 / March 31, 1998
1
www.semtech.com
EDGE HIGH-PERFORMANCE PRODUCTS PIN Description
Pin Name Driver DRVENA, DRVENA* DRVENB, DRVENB* DHIA, DHIA* DHIB, DHIB* DOUTA DOUTB DVLA, DVHA DVLB, DVHB DVLCAPA, DVHCAPA DVLCAPB, DVHCAPB SLEWADJA SLEWADJB BIAS Power VEEA, VEEB VCCA, VCCB GNDA, GNDB Test Pins THERMAL DIODE
Pin #
Description
25, 24 5, 6 27, 28 3, 2 18 12 22, 23 8, 7 16, 21 14, 9 20 10 1
Wide voltage differential input pins that determine whether the driver (A and B respectively) is forcing a voltage or placed in a high impedance state. Wide voltage differential input pins that force one of two programmable levels (DVH or DVL) at the driver (A and B respectively) output. Driver A and driver B outputs. Buffereed analog inputs that program the low and high output levels for driver A and driver B. Analog pins. 0.01 µF capacitor to ground should be connected to each pin. Analog current inputs that adjust the rise and fall slew rates of driver A and driver B. Analog input. A positive current into this node sets the internal bias level for driver A and driver B.
17, 13 19, 11 26, 4
Negative power supply for driver A and driver B. Positive power supply for driver A and driver B. Device ground for driver A and driver B.
15
Thermal monitor output used to track the die junction temperature.
2000 Semtech Corp.
2
www.semtech.com
EDGE HIGH-PERFORMANCE PRODUCTS PIN Description (continued)
28-Pin PLCC
SLEWADJA 20
DVHCAPA
DRVENA*
DRVENA
25
24
23
22
21
GNDA DHIA DHIA* BIAS DHIB* DHIB GNDB
26 27 28 1 2 3 4
10 11 5 6 7 8 9
19
VCCA
DVHA
DVLA
18 17 16 15 14 13 12
DOUTA VEEA DVLCAPA THERMAL DIODE DVLCAPB VEEB DOUTB
DRVENB
DRVENB*
DVHCAPB
2000 Semtech Corp.
3
SLEWADJB
VCCB
DVHB
DVLB
www.semtech.com
EDGE HIGH-PERFORMANCE PRODUCTS Circuit Description
Introduction The driver circuit will force the DOUT output to one of three states: 1. 2. 3. DVH (driver high voltage level) DVL (driver low voltage level) High Impedance (Hi Z). Driver Levels DVH and DVL are high input impedance voltage controlled inputs that establish the driver logical high and low levels respectively. DVLCAP / DVHCAP These two analog nodes are brought out to better stabilize the high and low driver levels. Much like placing decoupling capacitors on the DVL and DVH input pins, the DVLCAP and DVHCAP pins require a fixed .01 µF chip capacitor (with good high frequency characteristics) t o ground. A tight layout with minimum etch is recommended. Driver Bias T h e drive enable (DRVEN/DRVEN*) inputs control whether the driver is forcing a voltage or is placed in a high-impedance state. If DRVEN is more positive than D RV E N * , the output will force either DVL or DVH, depending on the driver data inputs. When DRVEN is more negative than DRVEN*, the output is set to highimpedance, independent of the driver data inputs. Driver Data The BIAS input structure is shown in Figure 1. The driver data inputs (DHI/DHI*) determine whether the driver output is high or low. If DHI is more positive than DHI*, the output will force DVH when the driver is enabled. If DHI is more negative than DHI*, the output will force DVL when the driver is enabled. Table 1 summarizes the functionality of the driver enable and driver data pins.
DRVEN, DRVEN* DRVEN > DRVEN* DRVEN > DRVEN* DRVEN DHI* DHI < DHI* X DOUT DVH DVL HiZ
VEE VCC
Both driver digital control inputs (DHI/DHI*, DRVEN/ DRVEN*) are wide-voltage differential inputs capable of receiving ECL, TTL, and CMOS signals. Single-ended o p e r a t i o n is achievable by generating the proper threshold levels for the inverting inputs. Drive Enable
The BIAS pin is an analog current input that establishes a reference current for the driver and influences the overall speed and power consumption of the chip. The BIAS input current may be varied from 1.0 mA to 2.0 mA. Ideally, a current source would supply this current. However, a resistor to a voltage source, typically VCC, is acceptable.
REXT BIAS 50
Table 1. DRVEN and DHI Pin Functionality
Figure 1. BIAS Input Structure
2000 Semtech Corp.
4
www.semtech.com
EDGE HIGH-PERFORMANCE PRODUCTS Circuit Description (continued)
The desired value for the external resistor can be determined from the relationship: IBIAS = (VCC - .7) / (Rext + 50). The actual IBIAS level is determined by selecting the desired performance and power level. The charts listed in the Application Information section enable the user to quickly determine the appropriate bias level. Thermal Monitor The Edge692 includes an on-chip thermal monitor accessible through the THERMAL DIODE pin. This node connects to 5 diodes in series to VEE (see Figure 2) and m ay be used to accurately measure the junction temperature at any time.
Thermal Diode
Slew Rate Adjustment The driver rising and falling slew rates are adjustable from 2 V/ns to 1 V/ns. The actual slew rate realized is a function of the chip bias and slew rate adjust input cur rents. The SLEWADJ input is determined by selecting the desired performance and power level (after the BIAS c u r r e n t is first chosen.) The charts listed in the Application Information section enable the user to quickly determine the appropriate SLEWADJ level. SLEWADJ is a current controlled input that varies the rising and falling edge slew rates. Ideally, a current DAC would be used to establish this current. However, a resistor to a positive voltage, typically VCC, is acceptable. Figure 3 shows a simplified schematic of the SLEWADJ input stage. Once a desired input current is selected, the external resistor value is determined by the following relationship: (VCC - .7) / (Rext + 860) = Islewadj.
VCC
Bias Current
Temperature coefficient = 10 mV/ C
°
REXT SLEWADJ
VEE
1.72K
1.72K
Figure 2. Thermal Diode String A bias current of 100 µA is injected into this node, and the measured voltage corresponds to a specific junction temperature with the following equation: TJ(°C) = {[(VTHERMAL DIODE VEE) / 5] .7} / (.00208). Notice that the driver A slew rate and driver B slew rate are independent. However, the rising and falling edge slew rates on each driver track each other and are not independent.
Iradj
Ifadj
Figure 3. SLEWADJ input circuitry
2000 Semtech Corp.
5
www.semtech.com
Others parts begin by e6
E6-1
|
|
|
